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CAS Timing and Frequency

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June 11, 2013 5:42:00 PM

I have been reading up on RAM and testing different settings for my RAM (Corsair Vengeance 2x 4Gb, 1600MHz, CL8), and I'm wondering what the real difference is between CAS 8 @1600MHz and CAS 10 @2000MHz is.
Aren't they effectively the same thing? Is this math correct? : 1/(Frequency*1000)*CAS= nano seconds for access or change in data. eg, 1/(800*1000)*8= 10 nano seconds? same value for 1000MHz with CAS of 10.
What happens in the time where there is waiting for the next cycle? This must be where the difference in performance is.

Help to understand this is greatly appreciated.

Edit: I found this article a while ago. http://www.thetechrepository.com/showthread.php?t=160

More about : cas timing frequency

June 11, 2013 5:49:30 PM

Latency and clock speed are two different things. Clocks higher than 1600mhz are pretty useless unless you have an AMD APU. A low CAS though can speed up everyday software. A CAS of 9 for 1600mhz is average, but there are sticks of 7 out there.
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June 11, 2013 5:57:46 PM

maestro0428 said:
Latency and clock speed are two different things. Clocks higher than 1600mhz are pretty useless unless you have an AMD APU. A low CAS though can speed up everyday software. A CAS of 9 for 1600mhz is average, but there are sticks of 7 out there.


Yes, but can you explain the performance difference between the two settings I described? What is happening while the CAS is waiting for the appropriate cycle? What I'm trying to say is that it looks to me like they are the different things with the same results.

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June 11, 2013 6:21:30 PM

You are basically correct, 1600/8 and 2000/10 are very similar performance wise - 2000 has a slight edge to that respect, where the freq diff really comes into play is where bandwidth is factored in. 2000 sets have a much higher bandwirth that primarily shows in multi-tasking and memory intensive operations i.e. large data sets, CAD, GIS, images, video editing/rendering etc.

As far as the difference you can get into technical discussions on it , but just looking at it as a stair case is easier...look at DRAM as freq/CL if we look at it as a chart that stair steps then we have

1600/7 - 1866/8 - 2133/9 - 2400/10 - 2666/11 - 2800/12

then starting at 1600 each step up is a small performance step and an increase in bandwidth.

From here you can look at other sets lets say you come across 2133/8, that a bigger jump in performance than the 2133/9 nine set, and since it's running quicker at 8 instead of 9 that increases the effectiveness of the wider bandwidth.

On the other hand instead of the 2133/9 in our chart, you look at a 2133/10 set, you still have a bandwidth vantage, the sticks are running less cycles and might well drop in performance to the level of the 1866/8 or prob lower and the incresed bandwidth can't override that
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June 11, 2013 6:34:31 PM

Okay, so how is bandwidth affected by 1600 @CAS 8 vs 2000 @ CAS 10? Does this relate to the BCLK of the CPU? Sorry if this is getting difficult to explain.
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June 11, 2013 7:12:20 PM

The bandwidth is based on the freq of the DRAM the CL basically sets a clock on how fast new instructions can be started - sort of elementary description but think effective
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June 11, 2013 7:34:52 PM

Good ref and I like them applying it to SLI, but same with basically all, the lower the CL at a given freq the better
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June 11, 2013 7:45:50 PM

I know, but If you look at the two types I was comparing (CAS 8 @1600MHz and CAS 10 @2000MHz), they mathematically scale the same right? But does the performance?
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June 11, 2013 7:49:01 PM

The 2000 set is slightly faster and has more bandwidth
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June 11, 2013 8:12:42 PM

Tradesman1 said:
The 2000 set is slightly faster and has more bandwidth


Would this be because there is more time for other functions in the memory to happen? I am guessing this because, a set of instructions may take 'x' amount of cycles to complete with one set but '2x' with the other, as the task does not entirely fit into the first 'x' of cycles?
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June 11, 2013 8:37:24 PM

As far as an instruction being passed, just as an example if it goes to the 1600/7 it comes in and takes 1500 MB of bandwidth to complete but the 1600 only has 1400, then it it takes two clock cycles 14 seconds. - if the 2000/9 sticks have a band width of 2000, then it easily takes care of the same instruction flies through in a single clock cycle of 9 seconds - this is a drastic somewhat oversimplification, but essentially that's it. I'm sure you can find plenty of examples on the net that are more in depth and/or technical, but to be honest I could write a very long detailed explanation, but don't really have the time
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June 11, 2013 8:45:12 PM

Hey, thanks everyone for all the help, especially Tradesman1. I will continue testing, to find the timing that suits me best but now I have a slightly better understanding of how it works. :) 
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June 11, 2013 9:14:05 PM

Glad to hear it, will keep a ear out for you (or is it an eye ;) )
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