zerophase :
At first I started to think the MHz value is just multiplied by 2 to get the data transfer rate of RDRAM, but then in the same article they mention certain RDRAM chips don't follow that rule. Namely on, PC600 RDRAM runs at 266 MHZ, while PC800 RDRAM runs at 400MHZ.
PC800 RDRAM runs at a clock of 400 MHz and it uses a DDR-way of transporting the data. Thus the 16 bit or 2 Byte data are transported at 800 MHz, explaining the '800' in PC800. ...
If you think that PC600 stands for 300 MHz you're dead wrong. PC600 RDRAM runs at 266 MHz
Link to the article
So, what's the correct formula for calculating transfer rate? Multiplying by 2 seems accurate in some cases but not all.
The method for calculating any bus transfer rate is as follows:
Throughput = <transfers per pin per clock> * <reference clock rate> * <number of IO pins>
For the case of DDR3-1600 on a standard 16 bit module that would be
<2> * <800Mhz> * <16bits> = 25.6 Gigabits per second
Shunt 4 of those 16 bit modules together to form a single x86 memory rank (64 bit IO bus) and we get,
<25.6> * <4> = 102.4 Gigabits per second, or 12.8 Gigabytes per second.
The term PCx-yyyyy has been misused horribly for marketing purposes. The term DDRx-yyyy refers specifically to a standard in which each IO pin transfers yyyy megabits per second against a reference clock. Most SDRAM modules have either 8 or 16 IO pins for a total of yyyy megabytes per second, or 2*yyyy megabytes per second respectively. High density SDRAM chips used on servers have 4 IO pins for a total of yyyy/2 megabytes per second. On x86 PCs, these chips are arranged into what's called a rank, a set of chips that form a 64 bit wide IO bus. If 16 bit modules are used, 4 will be put into parallel such that each chip receives the same command yet works on a different section of the IO bus. From a logical perspective it does not matter if a single 64 bit SDRAM chip is used, if two 32 bit SDRAM chips are used, if four 16 bit SDRAM chips are used, or if eight 8 bit SDRAM chips are used. As far as JEDEC is concerned, the PCx-yyyyy rating denotes the bandwidth across one of these buses without respect to the combination of individual modules.
This gets more complicated with the introduction of mobile and handheld devices. The Apple A6x SoC used in the iPad 4 uses four 32bit memory channels which provide the same theoretical bandwidth as a dual channel Intel microprocessor running the same DDR3-1066 chips.
Whereas DDR3-1600 is equivalent to PC3-12800 on a desktop with a 64 bit IO bus, DDR3-1600 is equivalent to PC3-6400 on a mobile device with a 32 bit IO bus.
Here at least there's some basis for calculating the numbers. With RDRAM it's simply whatever RAMBus felt like slapping on the product to attempt to one-up DDR-SDRAM
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