What is the IPC of the intel core i5-3330 3.0 ghz?



IPC depends on the instruction set and benchmark used. x86 macroinstructions (the x86 CISC instructions) are decoded to architecture dependent x86 microops (RISC instructions). Each CPU family is slightly different and has different capabilities in terms of how the various microops can be ordered concurrently. I believe that SandyBridge and IvyBridge can decode up to 3 CISC instructions per clock cycle, and each have 6 execution ports serving 15 different RISC execution units. I believe that Haswell can decode up to 4 CISC instructions per clock cycle, and has 8 execution ports serving 18 different RISC execution units. The execution units perform very specific tasks, and execution units sharing ports will block eachother. Execution units that are used most often (load/store, arithmetic) have their own ports, whereas those that are used less often (vector operations) share ports.

This makes evaluating performance of microprocessors very dependant on having a common baseline to evaluate them against. The most common arithmetic benchmarks are the Dhrystone (integer) and Whetstone (floating point) benchmarks. Each benchmark defines a finite number of abstract operations per iteration, and counts the number of iterations performed by a CPU over a period of time to calculate the DMIPS/FLOPS of that CPU.
 

dante123

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Sep 15, 2013
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Ok thanks at first for the quick responses. Maybe this will help to solve the question:

The benchmark that is used is the Linpack Benchmark and the OS has a 64-Bit instruction set. So the question is is the IPC 4,6 or 8
 


64-bit isn't an instruction set. EM64T and AMD64 are processor extensions which drastically change the performance of the CPU, but add relatively few new capabilities. Relevant floating point operations exist in the various SSE extensions as well as the newer AVX extensions. Since all of the SSE/AVX execution units are packed onto only a few execution ports, it's very hard to relate this back to a theoretical maximum. Peak IPC can only be reached through a benchmark that attempts to load all of the execution ports at once, and this would have to be hand tailored to each microarchitecture. A rather difficult task. This is why abstract benchmarks such as Dhrystone, Linpack, and Whetstone are preferable. They use a common mathematical basis and allow the microprocessor to handle it in an implementation specific fashion.

For example, if a Linpack system requires 10,000 floating point operations to solve based on algebraic analysis, and a CPU can solve 10,000 of these per second, then the floating point capabilities would be around 100 megaflops.