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In general, you can use a switch to connect all devices to a total PCI-E width of some number. So in the case of the LGA1155 platforms, for example, you can have 16 PCI-E 3.0 lanes pumped into say, 2 PCI-E slots. Then, a switch allows both slots to physically connect to 2 GPUs at 16x PCI-E 3.0 bandwidth, but will only communicate to the CPU at a max rate of 16x PCI-E 3.0. It is similar to the situation with network switches, where you have say, a 5 port 1 Gigabits/s switch, then no matter how many devices you plug in, if you stream from say, 1 computer providing a single 1 Gig LAN connection, then the other 4 ports will sum up to a max of 1 Gig LAN connection when communicating with that computer. However, if the other computers on that switch communicates with each other, they will have full 1 Gbits/s speed in between, as the traffic moderation device is a switch, not a hub.
The situation is the same for computer PCI-E slots with switches. The total bandwidth allowed to the switch depends on where this switch is installed. If the switch is installed very upstream, say at the 40 lanes split, then you'll have say, 4 PCI-E slots sharing that 40 lanes, where each averages a total of 10 lanes when information is transmitted from the CPU or to, although they all still connect at a bus speed of 16x PCI-e lanes. In LGA1155 setups, this is often the case, where the switch sits ahead of the PCI-E lanes to split the traffic between the remaining PCI-E slots. This was also the source of the PCI-E 3.0 compatibility issue a few years ago, because the switches themselves dictate the max revision of PCI-E signalling available downstream, since all the lanes and physical layouts have not changed between PCi-E 2.0 and 3.0, just the way the signals are coded.
NOW, seeing that as it may be, in the past, a lot of manufacturers tried to use the switches to advertise more 16x or 8x PCI-E lanes, to entice the buyer. And although in a few few cases, some solutions like that does increase performance very marginally, generally the result haven't been very positive (like what Anandtech said about the Nvidia NF200 switch "performance reducing NF200 solutions"). The truth is that if you install the switch way upstream, like most NF200 implementations, you increase the latency of all the slots below, and when you use only a single GPU, that GPU has to have data relayed by a switch, whether you want to, or not, thus decreasing performance (as per Anand's word). BUT, when you use dual or more GPUs, the GPUs can sometimes inter-communicate faster at full native 16x PCI-E speed (because like the LAN analogy, they are talking to each other without the CPU playing a role), you can get a marginal speed boost in multi-GPU setups at ridiculously high resolutions. The other issue with the NF200 switches is that you do connect at PCI-E 16x, but a revision 1.x (from memory), and sometimes fools the user into thinking they are getting 16x PCI-E 2.0, when really it is half that in revision and bandwidth.
For your setup, it seems like ASUS installed the switches between the last blue PCI-E slot and the first white one, so this is your PCI-E layout, as summarized by Anandtech: "PCIe layout is not that intuitive, though a user should fill up the blue x16 slots first from top to bottom, then the white. As a result, we have a PCIe x16, x1, x8, x8 (non-GPU), x16, x1. The second blue x16 reduces to x8 when the first white x8 is populated." So the switch does seem like it is installed between the last blue and first white, where the bandwidth is shared between the two slots. They also specify that the 2nd white slot is a non-GPU slot for some reason, probably because it is tied to the southbridge instead of the CPU core.
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