- Oct 22, 2010
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what are the major components of cpu and their task?
- Thread starter Muneeb Ahsan
- Start date
Tabris DarkPeace
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- Jul 3, 2013
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Is this for a University assignment? (I honestly don't care, I just want to know how much detail you're after).
I don't believe this forum has rules against helping students who ask questions, unless it is so obviously a homework question.
You've got your ALU, FPU (ideally at least 2 per 3 ALU's of a certain complexity), and MMU's basically.
You've got datapath widths, integer size, and memory addresses widths.
These line up with data buses, registers (int size), and the address bus(es).
Some processor architectures may have dedicated address buses for RAM and hardware that the processor can 'talk' to directly, others -like x86, x64, etc.- do not.
x86/x64 share the address 'bus' between RAM (getting mapped to all that is left over) and devices that perform accelerated I/O. (Which dates back to circa the '386 - '486 era of home computing).
This reduced the cost of the machines substantially, and -at the time- having a 4GB address space was ample for both physical memory (RAM) and performing 'Accelerated I/O'; which was a major selling point at the time.
Without so called 'accelerated I/O' (and integrated level 1 caches) the Graphical User Interface transition of computing from console based command lines and text based BBS's would probably never have happened in millions of homes worldwide.
In fact having a small cache 'cache' the 20% of the code that does 80% of the work, in a hierarchy, is another economical design facet of the x86/x64 'home' computer.
Otherwise we'd just have 4GB of Static RAM.
(Which would be awesome, but also extremely expensive and probably not much faster over all).
You can gain a lot of insight by comparing the 80286 to the Pentium (P55C if I recall correctly) btw... the diagrams of both are available here and there.
- The Pentium diagram is available in Scott Muellers excellent Upgrading and Repairing PC's book.
I don't believe this forum has rules against helping students who ask questions, unless it is so obviously a homework question.
You've got your ALU, FPU (ideally at least 2 per 3 ALU's of a certain complexity), and MMU's basically.
You've got datapath widths, integer size, and memory addresses widths.
These line up with data buses, registers (int size), and the address bus(es).
Some processor architectures may have dedicated address buses for RAM and hardware that the processor can 'talk' to directly, others -like x86, x64, etc.- do not.
x86/x64 share the address 'bus' between RAM (getting mapped to all that is left over) and devices that perform accelerated I/O. (Which dates back to circa the '386 - '486 era of home computing).
This reduced the cost of the machines substantially, and -at the time- having a 4GB address space was ample for both physical memory (RAM) and performing 'Accelerated I/O'; which was a major selling point at the time.
Without so called 'accelerated I/O' (and integrated level 1 caches) the Graphical User Interface transition of computing from console based command lines and text based BBS's would probably never have happened in millions of homes worldwide.
In fact having a small cache 'cache' the 20% of the code that does 80% of the work, in a hierarchy, is another economical design facet of the x86/x64 'home' computer.
Otherwise we'd just have 4GB of Static RAM.
(Which would be awesome, but also extremely expensive and probably not much faster over all).You can gain a lot of insight by comparing the 80286 to the Pentium (P55C if I recall correctly) btw... the diagrams of both are available here and there.
- The Pentium diagram is available in Scott Muellers excellent Upgrading and Repairing PC's book.
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