is this the correct memory bus clock?

immafrog1337

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Jun 1, 2013
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so is my memory bus clock right? when i see other people with the gtx 560 ti fpb there memory bus clock is at 2,000 or something why is mine only at 1,026

this is what my 3d mark shows my card at

s0zrxv.png


this is the card i have.

http://www.newegg.com/Product/Product.aspx?Item=14-130-604&SortField=0&SummaryType=0&Pagesize=10&PurchaseMark=&SelectedRating=-1&VideoOnlyMark=False&VendorMark=&IsFeedbackTab=true&Keywords=3dmark11&Page=1#scrollFullInfo


 
Solution


It's fine.

GDDR5 uses two separate differential clocks (whereas DDR3 from which GDDR5 derives uses only a single differential clock).

The first clock is for command and address operations, and the second clock is for reads and writes. The second clock is twice the frequency of the first, and data on the IO bus is transferred on the rising and falling edge of the read/write clock.

The GTX 560 Ti reference implementation has a memory transfer rate of 4008 megabits per second per IO pin. Multiply this by the width of the IO bus which is 256 to get the bandwidth in megabits per second, and divide it by 8 to get the bandwidth in megabytes per second which is 128,256 or 128.25...


It's fine.

GDDR5 uses two separate differential clocks (whereas DDR3 from which GDDR5 derives uses only a single differential clock).

The first clock is for command and address operations, and the second clock is for reads and writes. The second clock is twice the frequency of the first, and data on the IO bus is transferred on the rising and falling edge of the read/write clock.

The GTX 560 Ti reference implementation has a memory transfer rate of 4008 megabits per second per IO pin. Multiply this by the width of the IO bus which is 256 to get the bandwidth in megabits per second, and divide it by 8 to get the bandwidth in megabytes per second which is 128,256 or 128.25 gigabytes per second.

The 4008 megabits per second is transferred on the rising and falling edge of a 2004 Mhz read/write clock which is twice the frequency of the 1002 Mhz command and address clock.

Your 560 Ti FBP is slightly overclocked to a datarate of 4104 megabits per second per IO pin, which when divided by 4 (twice for the DDR, and twice for the clock rate) yields a command and address clock rate of... 1026 Mhz.

Futuremark is notorious for misreading sensors and marketing departments are notorious for confusing transfer rates and oscillator frequencies.

Everything is as it should be!
 
Solution