How does prossesor binning work?

Hi,

There's two separate questions here, so I'll answer them in order.

Processor binning is a post-fabrication test procedure that occurs at the factory after an integrated circuit (in our interest, a CPU or a GPU) has been fabricated but before it has been given a marketing designation and assembled for resale. The binning process tests for quality and defects, and ultimately results in the products placement on a spectrum of desirability.
Integrated circuits are fabricated on silicon wafers which are bound to have a few defects in either the silicon itself, or as a result of the manufacturing. These defects can either hinder performance characteristics or render a device wholly inoperable. Most manufacturers design their devices such that defective sections of the chip can be isolated and disabled. A good example is the SandyBridge-E i7-3930k and i7-3960x. Both of these chips are fabricated as 8 core microprocessors with 20 megabytes of L3 cache. Chips that have all cores and cache functional are reserved for high-end Xeon microprocessors that retail for thousands of dollars. Chips that have a few defects in the cache and cores will have those sections disabled and the resulting chip packaged as either a Xeon (few defects in the rest of the chip) or i7-3930k/i7-3960x (potentially more defects in the rest of the chip, but still operable).
In summary, the binning process separates out high quality products from low quality products and helps package them to meet market demands.

The AMD R9 295x2 can get away with only two 8 pin connectors for two reasons:

First, it may have a 500 watt TDP but the actual power consumption is closer to 400 watts, with 450 watts drawn under most heavy loads. It's a substantial improvement over the power hungry R9-290X. This is accomplished in part by using integrated circuits that have particularly desirable performance characteristics with respect to power consumption. 500 watts is the worst case, and is the case that manufacturers and consumers should design their cooling and power delivery around, but in most cases it will be much lower than that.

Second, the 8 pin PCIe connector is specified to deliver 150 watts, but that is a requirement, not a limit. The limit is implied through other sections of the ATX 2.3 specification, such as the no longer enforced limit of 240 voltamps on any output wire. Manufacturers have been thumbing their noses at the ATX specifications for some time, this is nothing new. This suggests that any modern PSU capable of delivering 500 watts to a pair of GPUs over a pair of 6+8 connectors (which would be within the ATX spec) should be able to safely deliver 500 watts to a single GPU using a pair of 8 pin connectors as long as the power delivery doesn't trip over current protection.
In many cases, each 8 pin connector is paired with a 6 pin connector and connected to an over-current protection of around 20 amperes to form a 12 volt rail. The rated minimum 225 watts (150 on the 8 pin and 75 on the 6 pin) comes in just below the 240voltamps recommended by ATX (voltamp is apparent power, but PFC for ASICs is handled by the device's VRM and we don't want to worry about the transients so lets just call this 240 watts). Realistically, the 8 pin needs to be able to handle all 240watts on a single wire alone before tripping OCP, so it should be fine to handle 240 watts across 3 wires without much trouble as long as the accompanying 6-pin connectors aren't hooked up to anything.