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Bandwidth, chipsets and connectors

Tags:
  • Chipsets
  • USB3
  • Blackmagic
  • Z97
  • Bandwidth
  • Motherboards
  • PCI Express
  • Intel
August 12, 2014 12:09:45 PM

Hey all!

As a pretty tech savvy guy in terms of hardware, there is still a couple of questions I'd like to get answers to.

I am going to upgrade my rig with a Gigabyte GA-Z97X-UD7 TH and a 4790K, however, it might not be sufficient?

Q1: How is PCI lanes connected to the chipsets and how is the PCI-e lanes distributed among them?

This is a question I've wondered about for quite some time, mostly because I want to have 3x Blackmagic Design Intensity Pros in my production rig, but as for now, only 2 wants to work at a time.

The two existing Intensity Pros has been working good and alongside a Matrox MXO2 Mini via PCI-e card on a Gigabyte GA-990FXA-UD7 equipped with a AM3 Phenom II 1100T (Hexacore, 3.3Ghz) and 8 Gigs of 1600Mhz RAM. I know the setup might not be sufficient for recording/encoding but I am using other solutions for that.

The problem seems to be the distribution of the PCI-e lanes as far as I know, but why and what is why I came here.

I've tried a Asus Crosshair V Formula as well with the same problem, but I know that they're using the same chipsets for both of them (AMD 990FX and SB950) and I'm using a dedicated GPU as well, so I'm not suprised that there's a problem there.

Q2: Using multiple USB 3.0 chips, will devices that require full bandwith work?

E.g.: I want to run a Blackmagic Design Intensity Shuttle and a Avermedia ExtremeCap U3 on the same PC, and a motherboard like the GA-Z97X-UD7 TH has one Intel and one Renesas controller. Will I be able to use both at the same time?

Q3: In addition to these PCI-e and USB 3.0 input devices, I would like to connect other devices like Blackmagic's MiniRecorder and Cinema Camera through Thunderbolt. Will this cap my total bandwidth within the system? I am going to put a beefy graphics-card in there aswell, and due to the upto 7x 4:4:4 colorspace 1080p streams coming through, it wouldn't seem unlikely that the bandwidth across the different chipsets etc. would bottleneck. Am I right?

Any help is appreciated.


Cheers,
Håvard

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