1.5V or 1.65V?

SHATORR · Aug 26, 2014

So I'm buying a set of new RAM and it's currently between the "Corsair 2x4GB CL9 1600Mhz VENGEANCE 1.5V" and the "Team Group Xtreem 2x4GB CL10 2400MHz", which is 1.65V.

Now I've read that I should take the response time into consideration, which I could get by dividing for example 9/1600 and 10/2400. Thus, the Xtreem's seem like a way better deal to me (same price). I don't know how much the voltage matters tho, so is it a yay or a nay?

legend001523 · Aug 26, 2014

Any voltage is fine, get the corsairs as they have a cl9, which is ideal for gaming

SHATORR · Aug 26, 2014

legend001523 :

So I shouldn't care about 10/2400 being quite alot lower than 9/1600? That would make the Xtreem 35% faster.

Novuake · Aug 26, 2014

If the Team Group RAM is the same price then hell yes go for those, MUCH higher frequency and barely higher latency.

1.65v is the standard for RAM 2133MHz+ so don't worry about that.

legend001523 · Aug 26, 2014

^that's something to think about too

SHATORR · Aug 26, 2014

Novuake :

That's why I'm asking, Corsair = 795:-, Xtreem = 819:-

Novuake · Aug 26, 2014

Using the above chart, the general rule is too try and keep the NS under the value of 11 (very high performance bins, 9 is the preferred).

With a frequency of 2000Mhz and CAS of 10, its already at 10. So 2400Mhz CAS 10 RAM would be much better(to lazy to do the math now).

Source : http://www.thetechrepository.com/showthread.php?t=160

Tradesman1 · Aug 26, 2014

Think of it this way on one hand you have 1600/9 and 2400/10 right? If you wanted to run the 2400 sticks at 1600 you could run them at 1600/7 - which is far better than 1600/9 - plus at 2400 you have much more bandwidth allowing to do more with DRAM at once

Pinhedd · Aug 26, 2014

Novuake :

That thread is full of crap.

If the modules on a DRAM bus are programmed with CAS 10 the memory controller won't sit around twiddling its thumbs for 10 cycles while it waits for a read operation to complete. It will interleave banks on the ICs and ranks on the channels to keep the bus busy. Trouble occurs when the memory controller isn't sophisticated enough to track the state of each bank of each rank on the bus and each operation in flight and is thus unable to schedule memory operations efficiently. This results in bandwidth being wasted. The effects of loose timings are attenuated when that DRAM IC is paired with a well designed memory controller. Thus, higher data rates are more desirable when the device that's controlling it is robust.

Novuake · Aug 27, 2014

Pinhedd :

Novuake :

That thread is full of crap.

If the modules on a DRAM bus are programmed with CAS 10 the memory controller won't sit around twiddling its thumbs for 10 cycles while it waits for a read operation to complete. It will interleave banks on the ICs and ranks on the channels to keep the bus busy. Trouble occurs when the memory controller isn't sophisticated enough to track the state of each bank of each rank on the bus and each operation in flight and is thus unable to schedule memory operations efficiently. This results in bandwidth being wasted. The effects of loose timings are attenuated when that DRAM IC is paired with a well designed memory controller. Thus, higher data rates are more desirable when the device that's controlling it is robust.

You will note the article is older, so yes, some points are not up to date with modern memory standards (FIY : Most of your explanation is limited to Intel controllers. AMDs are still in the stoneage)

Not that I understood all of it

Pinhedd · Aug 27, 2014

Novuake :

Pinhedd :

You will note the article is older, so yes, some points are not up to date with modern memory standards (FIY : Most of your explanation is limited to Intel controllers. AMDs are still in the stoneage)

Not that I understood all of it

It doesn't matter how old it is, that aspect of the technology hasn't changed since page mode DRAM was introduced decades ago

Jack yang · May 27, 2015

XTREEM!!!

Novuake · May 27, 2015

Jack yang :

Necro a year old thead! Please don't.

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