Question about register renaming ?

090909090909 · Mar 18, 2015

How do a processor rename its registers ?

Pinhedd · Mar 18, 2015

090909090909 :

Hi,

register renaming is performed early on in the execution pipeline. Microprocessors expose a fixed number of addressable registers. When operating in protected mode, x86 exposes 8 32-bit general purpose registers, 8 80-bit floating point registers (with x87 extensions), and 8 128 bit vector registers (with SSE extensions). When operating in long mode, x86 exposes 16 64-bit general purpose registers, 8 80-bit floating point registers (depreciated), and 16 128 bit vector registers. If the microprocessor supports AVX, the vector registers are 256 bits wide each.

Even though the number of addressable general purpose registers remains at 8 or 16 depending on the operating mode, the number of internal registers is much higher. Each Haswell microprocessor has a whopping 168 integer registers and 168 AVX registers per core. These registers are allocated dynamically between two front ends (hyperthreading); x87 instructions utilize the AVX registers.

A microprocessor that supports register renaming examines decoded instructions for data dependencies. When an instruction is found that uses the same register as a previous instruction, but does not share a data dependency with that instruction, the microprocessor will rewrite the instruction to use a separate register; it will then ensure that any instructions that are dependent on the rewritten instruction are rewritten to utilize the new register.

090909090909 · Mar 18, 2015

Pinhedd :

090909090909 :

Hi,

register renaming is performed early on in the execution pipeline. Microprocessors expose a fixed number of addressable registers. When operating in protected mode, x86 exposes 8 32-bit general purpose registers, 8 80-bit floating point registers (with x87 extensions), and 8 128 bit vector registers (with SSE extensions). When operating in long mode, x86 exposes 16 64-bit general purpose registers, 8 80-bit floating point registers (depreciated), and 16 128 bit vector registers. If the microprocessor supports AVX, the vector registers are 256 bits wide each.

Even though the number of addressable general purpose registers remains at 8 or 16 depending on the operating mode, the number of internal registers is much higher. Each Haswell microprocessor has a whopping 168 integer registers and 168 AVX registers per core. These registers are allocated dynamically between two front ends (hyperthreading); x87 instructions utilize the AVX registers.

A microprocessor that supports register renaming examines decoded instructions for data dependencies. When an instruction is found that uses the same register as a previous instruction, but does not share a data dependency with that instruction, the microprocessor will rewrite the instruction to use a separate register; it will then ensure that any instructions that are dependent on the rewritten instruction are rewritten to utilize the new register.

Thanks. I understand the basics and I understand that has more architectural registers more the ISA , but I want to know the operations that the processor do to rename its registers and please put a little explanation about any component (e.g..RT)
and what is long mode and protected mode?
Thanks again.

Pinhedd · Mar 18, 2015

090909090909 :

The exact mechanism of the register renaming technique differs from architecture to architecture. Most microarchitectures use a cyclic ring buffer called a re-order-buffer (ROB). The ROB contains the microprocessor's book keeping of all the instructions that are in flight, including references to data dependencies. In some architectures, the ROB entries contain the execution data (rather than just a reference to that data) which enables a smaller physical register file.

I do not know the details, but I imagine that on Intel's implementation there's no strict relationship between an architectural register exposed by the instruction set and a physical register in the microprocessor. Any of the 16 GPRs from either of the front ends can probably be mapped to any of the 168 integer registers and renamed repeatedly as long as there's still room in the ROB/PRF.

EDIT:

Protected mode and long mode are two modes of operation on the x86 microprocessor. Protected mode is more commonly known as 32-bit mode, and long mode as 64-bit mode. These are slight misnomers, but that's not overly important right now.

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