So not long ago I got an old workstation - the Dell Precision T5500 with a Xeon E5620 and 5520 chipset (seems similar to X58.) I can't find any info on the Xeon, but the 5520 provides 32 lanes, plus 4 for the south bridge (I think.) However, the T5500 has 2 x16 slots and 2 x8 slots, for a total of 48 lanes (not counting sata, usb, pci, pci-x, etc.) There's no mention of lanes/slots getting disabled by adding high bandwidth cards. So where are the extra 12-16 lanes coming from? Can't find anything on this old Westmere CPU providing PCIe lanes at all...
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Understanding PCIe lanes
- Thread starter imrazor
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ShadyHamster
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The 2 x16 lanes most likely drop down to x8 when all 4 slots are occupied.
One or more slots might even drop down to x4 depending on how everything is wired up.
One or more slots might even drop down to x4 depending on how everything is wired up.
Geekwad
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There is s difference between the physical slot size and the electrical specifications (bandwidth) of the slot. You can have a x16 physical slot that only works as x8 electrically as an example.
In the case of the 5520, you have 32 PCIe 2.0 lanes directly to the CPU from the slots, and another 4 (DMI) for the chipset for 36 total. If you populate the two x16 slots (physical), they still run at x8 electrically as configuration of the board is to run at 4x8....no matter the size of the physical slot it's occupying:
http://ark.intel.com/products/36783/Intel-5520-IO-Hub
http://www.intel.com/content/dam/support/us/en/documents/motherboards/server/sb/d38960006_s5000datasheet.pdf
Though you can still put x1, x2, or x4 into any of them of course....in which case they run at their max possible for the device in the PCIe 2.0/1.1 specification.
In the case of the 5520, you have 32 PCIe 2.0 lanes directly to the CPU from the slots, and another 4 (DMI) for the chipset for 36 total. If you populate the two x16 slots (physical), they still run at x8 electrically as configuration of the board is to run at 4x8....no matter the size of the physical slot it's occupying:
http://ark.intel.com/products/36783/Intel-5520-IO-Hub
http://www.intel.com/content/dam/support/us/en/documents/motherboards/server/sb/d38960006_s5000datasheet.pdf
Though you can still put x1, x2, or x4 into any of them of course....in which case they run at their max possible for the device in the PCIe 2.0/1.1 specification.
@Geekwad I know that a PCIe slot can be physically one thing, and electrically another. In the case ot the T5500, it has 4 x16 *physical* slots. However, the manual explicitly states that 2 are electrically x16, and the remaining two are x8. That gives 48 lanes of total connectivity despite the 5520 only giving 32 lanes (or 36 depending on how you look at it.) I suppose it may dynamically reallocate the PCIe lanes if all 4 slots are populated, but I'm not seeing anything in the manual about that.
I'm actually a little confused by the 2nd link.It seems to be for the Blackford chipset (3 x8 links instead of 2 x16), rather than the Tylersburg in my machine.
I'm actually a little confused by the 2nd link.It seems to be for the Blackford chipset (3 x8 links instead of 2 x16), rather than the Tylersburg in my machine.
Geekwad
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@imrazor
Ah, OK. I tried to quick find some more info on the T5500 last night but for some reason couldn't. Was trying to glean from Intel's site what I could and mislinked.
http://www.intel.com/content/www/us/en/support/server-products/000006792.html
HP may be using a PLX chip on the board then. It can act as a lane multiplier/manager.
Ah, OK. I tried to quick find some more info on the T5500 last night but for some reason couldn't. Was trying to glean from Intel's site what I could and mislinked.
http://www.intel.com/content/www/us/en/support/server-products/000006792.html
HP may be using a PLX chip on the board then. It can act as a lane multiplier/manager.
Been doing some more research on this. According to this processor marketing sheet: http://www.intel.com/content/dam/www/public/us/en/documents/product-briefs/xeon-5600-brief.pdf
the E5620 can support TWO 5520 chipsets (called Dual I/O Hub) for a total of 72 PCIe lanes. Even so, I think you're likely right and they've used an NF200 or PLX chip to add a few extra lanes, as that would probably be less expensive.
the E5620 can support TWO 5520 chipsets (called Dual I/O Hub) for a total of 72 PCIe lanes. Even so, I think you're likely right and they've used an NF200 or PLX chip to add a few extra lanes, as that would probably be less expensive.
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