How exactly data travels between CPU and main memory?

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devuniv

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Aug 4, 2017
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From wikipedia "memory bus is the computer bus which connects the main memory to the memory controller".

But how exactly datastream travels from DRAM memory chip into CPU and back? Where is the place when data from "outside" main memory get into CPU (its L3 cache)?

I don't think data flows through memory controller, memory controller only facilitates this process somehow.

So CPU directly connected to memory bus where data travels back and forth?

 
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"Memory Controller" is a bit of a misnomer. There are two distinct components involved, the "Memory Management Unit", and the "SRAM/DRAM/SDRAM Controller".

The MMU is responsible for controlling one or more system busses, and each system bus is addressed via a...
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Pinhedd

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Aug 7, 2007
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"Memory Controller" is a bit of a misnomer. There are two distinct components involved, the "Memory Management Unit", and the "SRAM/DRAM/SDRAM Controller".

The MMU is responsible for controlling one or more system busses, and each system bus is addressed via a linear physical address space, a bus-specific addressing scheme, or both. An SRAM/DRAM/SDRAM Controller is a device attached to a system bus alongside a litany of other devices. A large chunk of the system's physical address space will be mapped to the SRAM/DRAM/SDRAM controller corresponding to the amount of memory installed on that controller.

For example,

A DDR3 DIMM is connected via a DDR3 SDRAM bus to a DDR3 SDRAM controller. This DDR3 SDRAM controller is connected to the MMU through a system bus. The MMU is connected to a lot of things, including various caches, and bus which connects it to the cores and/or IGP.
 
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