Well, why exactly does the nForce2 platform allow for maximum performance when the FSB and Memory Clock run at the same speeds? Shouldn’t DDR333 provide a higher level of performance, and so forth with DDR400? Well, to put it plainly, no. When the CPU FSB and Memory Clock are running at the same speed, the CPU Read Latency will be at its lowest. The address that the CPU sends to the memory and the data returned are sent back and forth at the same speed within the IGP/SPP’s memory controller. This means that the CPU does not have to wait for any conversions, commonly termed as “overhead,” to take place before it can be sent the necessary data. When the FSB and Memory Clock are running in asynchronous mode and are operating at different frequencies, this overhead penalty requires the data being sent back and forth to be synchronized with the clock domain that it will be entering. If data is going from a clock domain of 133MHz to 166MHz, the data must be resynchronized, therefore using up clock cycles and increasing latency. This is exactly why you’ll want to run your nForce2 system FSB and Memory Clock in sync.