Hail to Intel, the new DDR prophet!

Crashman

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Former Staff
Hey, the AMD guys should all be pleased by this also, because AMD will be going to faster bus speeds as well. If Intel makes the push to bring 400MHz DDR to the system, by the time AMD releases anything that needs it, it will aready have strong support in the market!

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That's right. The P4 would actually COMPETE will the T-Bird with 400MHz. DDR, and Yes too for the Athlon. I just have one question. Could some clear something up? What clock speed would this 400MHz. DDR be? 200MHz.? That doesn't make since cause the P4's Bus is 100MHz, Quad Pumped. Would Intel be upping the P4 bus to 200MHz. (800MHz quad pumped)? Thanks.

Jacob
 
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Dont hold your breath, It will probably be awhile away yet, I hope not though, I dont have a good record picking these things, years ago I paid $330 for 4m ram, a week later it went down to $190, Then I built my first dual sys, 2 weeks later intel released mmx, talk about bad timing
 

Crashman

Polypheme
Former Staff
No, Intel is seeking the same TRANFER RATE. So just as 4x100 and 2x200 are they same, they are pushing for 400Mhz DDR (actual clock is 200MHz) to match their 400MHz QDR FSB (actual bus speed 100MHz).

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Umm, Crashman
I was wondering, do you think that DDR will actually be better than RAMbs for the P4 when it hits its sweet spot? Leaving out all this whining about price. I don’t know but I think Intel made the P4 for RD for superior performance and we will see this happen. This is the way Intel has done it in the past when they do it right.
I kind’a hope it dose turn out that way so all these doubters will get what’s come’n to them?
 

yoda271828

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RDRAM has <b>high</b> bandwidth and <b>high</b> latency, and DDR-SDRAM has <b>medium</b> bandwidth and <b>low</b> latency. Single channel RDRAM has the same bandwidth as PC-1600 DDR-SDRAM. The dual channel RDRAM is where the increased bandwidth comes from. So, if PC-2100 DDR-SDRAM were put in a dual channel configuration it would have about 33% more bandwidth than RDRAM and a lot lower latency.
 

igottaknife

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How about that four channel memory controller setup on the GeForce3?? Put that on a board and watch DDR fly.

<font color=white> This new forum still sucks and btw so does </font color=white> <font color=red> ASUS </font color=red>
 

Crashman

Polypheme
Former Staff
SDRAM has less latency. The P4 is designed for high-bandwidth, which DDR provides, especially 400MHz DDR. Se even if the chip was designed for RDRAM, 400MHz DDR should still perform better.


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you have it backwards,
the P4 is not lackluster it is much faster given proper code and optimization than athalon..

it is true INTEL will offer DDR for the low end for P4,
but rambus is still much faster at 800 mhz, and is dual channel with 3.2 GPS bandwidth , 2 times that of DDR..

both will offer choice but rambus is still faster,
and rambus 2 with 1600 mhz has been demonstrated recently and will offer 6.4 GPS

CAMERON

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not really although somewhat correct..
actually a single RAMBUS 800 mhz chip performs
as well or better than a 2100 DDR..

but ddr has more problems in dual channel setups..
you need longer latency for smp and for dual memory setups,
which rambus has been designed all along..

RAMBUS 2 will be 1600 mhz and included using both sides on the wave channel for 6.4 GPS in dual channel configs..

DDR is not even close to that..
DDR is a low end solution that INTEL will use to suppliment
RAMBUS..

low end is why is it used by ALI and VIA, and AMD,
and not by SERVERWORKS, and INTEL, and HP.. whihc are medium and high end..
CAMERON

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Crashman

Polypheme
Former Staff
The P4 should be able to do EVERYTHING better than the PIII, clock for clock, PLUS have extra features. In that repect, it is a flop. Now as to the Rambus issue, we have already seen from PIII w/DDR that increasing memory bandwidth beyond processor bandwidth is fairly useless. So if 400MHz DDR has the smae bandwidth as the 400MHz QDR system bus, what good would it do to add more with Rambus? But DDR has less latency, which would be a good thing.

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ahh where did you get the idea that the P4 does NOT beat everything the P3 does.

as I have mentioned before, the P4 requires P4 code as it is a ground up new CPU totally different than the P3.

the P3's compiled software and SSE 1 instructions do not work effiencely for the P4 as it does not understand many or executes the p3 code more slowly

when you compare a p4 with P4 optimized code it does everything better than the P3..

the P4 has many new features, including 144 SSE 2 inst.
dual 3 ghz FP units, totally different 20 stage pipeline,
it can issue more instructions per clock, has 8 way new Die cache, etc et c

if you look at the engineering books for the 2 as I have
it states they are very different...

again as for RAMBUS it is not useless to increase bandwidth,
as bandwidth has been saturated with P3 and AMD above 900 mhz.. with SDRAM

that is why you get the law of dimishing returns as you go faster CPU's

RAMBUS and DDR big contribution is bandwidth,
becasue SDRAM could only do around 700 MPS, and that is not fast enough, therefore the memory is the bottleneck

whereas rambus allows 3.2 GPS plenty of hearroom till
2.5 ghz P4

P4 requires bandwidth and throughput, as it is much faster almost double that of P3 in many areas,
so using the example of P3 with DDR and RAMBUS is bad as the CPU was not fast enough to make a difference...
the P4 is and you have to hammer it with huge loads to even start to show its throughput and ability..

latency is an overused word that has little meaning
these days with very fast CPU's and chipsets.

if you have a latency of 5 for example but when executing you can deliver 5 Gigs of data

you are still better off than a latency of 2.5
delivering only 2 gigs of data

the are degrees and applications of latency..

anyway.. back to my email

have a good weekend
Cameron


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Kelledin

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actually a single RAMBUS 800 mhz chip performs as well or better than a 2100 DDR..
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You'll have to bear with me, but I'd have to see some reputable benchmarks before I could believe that. It defies the technical theory associated with the whole debate...

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but ddr has more problems in dual channel setups..
you need longer latency for smp and for dual memory setups
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ehhh...longer latency needed for SMP? I suppose that's possible. But it should also be no problem for an appropriate NorthBridge memory controller to manually force that latency. After all, the NorthBridge is all the CPU actually sees of the memory subsystem.

And for dual memory setups? The ServerSet III WS and higher has striped access patterns for PC133 SDRAM across 2 or 4 channels, which has lower latency than either DDR or RDRAM. Apparently, it can be done, and it performs very well in dual-CPU or quad-CPU servers.

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and not by SERVERWORKS, and INTEL, and HP.. whihc are medium and high end..
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A little recent development...ServerWorks is releasing a DDR chipset for the Xeon "Foster" CPU.

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Kelledin
"Eat a live frog in the morning, and nothing worse will happen to you for the rest of the day."
 
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WELL I CAN GIVE YOU ALOT OF EXAMPLES AND
BENCHAMRKS that
will demonstrate this
http://www.sharkeyextreme.com/hardware/guides/pentium4/8.shtml

http://www.rambus.com/products/products_benchmark_main.html

http://www.sisoftware.demon.co.uk/common/qa/ben_mem.htm

many other memory throughput test show this including windows mag et cetc

it does not define tech theory, actually DDR being slower than RAMBUS makes perfect sense
that is why INTEL chose RAMBUS for the high end

WHO ME ONE benchmark of a pentium 4 with rambus
is slower in memory throughput and bandwidth than DDR , you won't find one
YEs I use server works chipset in servers and they are good
but you cannot compare ECC registered SDRAM's
throughput to dual channel RAMBUS

one is 800 MPS and one is like 3.2 GPS

latency makes little difference when you can do GPS data chunks in parallel

CAMERON


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Serverworks is releaseing DDR because their chipsets compete with INTEL and INTEL and RAMBUS has cross licensing
agreements which INTEL will not allow Serverworks to have..

DDR will be an improvement to serverworks chipsets
using SDRAM BUT
they will not compare to INTELs upcomming 860-900 series
chipsets which will use dual and quad channel RAMBUS,
and 64 bit 66 mhz PCI, AGP PRO, ATA 200 ,and dual and quad design CPUs.

nor does it have a MERCED chipset with RAMBUS or DDR

CAMERON





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Other Benchmark and Product Reviews:

SharkyExtreme-
Intel Pentium 4 Guide and Pentium 4 1.4GHz & 1.5GHz Review - November 20, 2000
"Dual RDRAM channels pay off for the i850 chipset; landing the largest memory bandwidth number we have ever seen. Compared to the i815E running a 133MHz bus, Intel's quad-pumped 100MHz bus delivers more than three times as much memory performance. Even AMD's newly released 100MHz double-pumped DDR platform can't keep up and scores less than half the bandwidth."

http://www.sharkeyextreme.com/hardware/guides/pentium4/8.shtml

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High Performance for Media Content Developers

Media creation by professional and home-users alike can also benefit from the high memory bandwidth that RDRAM provides to the Pentium 4 processor. Professional video editors using Adobe Premiere can achieve up to 32% higher performance on a Pentium 4/RDRAM platform over an Athlon/266MHz or Pentium III/PC133 platforms.
Source:
http://www.sharkeyextreme.com/hardware/guides/pentium4/8.shtml
http://www.rambus.com/products/products_benchmark_main.html


Home-users can also experience the media-creation benefits of the Pentium 4 processor with RDRAM. Tests performed on Ulead Video Studio show that the Pentium 4 with RDRAM provides 100% performance increase over an Athlon/266MHz DDR platform and 45% increase over a Pentium III/PC133 platform.
Source: www.sharkeyextreme.com/hardware/guides/pentium4/22.shtml


that pretty much says it all facts wise anyway
CAMERON

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Crashman

Polypheme
Former Staff
Nice detail on the excuse, unfortuanately, NOT ALL programs will be optomised for the P4! The P4 should be able to beat the PIII in FPU, and it's SSE2 should be able to mach the PIII in doing SSE calculations, PLUS do SSE2! At the very least it should be able to beat the PIII in 5-year old programs that were optomised for the original Pentium!

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NO THAT IS PRECISELY MY POINT GUY,
5 year old x86 code must be translated from cisc to risc
and thus this is why the P4 does not do well with P2\3\P1
code, how can you say that a Pentium4 should be able to execute software designed for a 5 or 10 stage pipeline
on older pentiums as efficiently as P4 code with 20 stage pipes,dual FPU units that a 2 times bigger, and a totally different architecture...

the P4 code if you look at it, breaks down into smaller units, is more efficient, and multithreaded to allow for the greater capabilities of the P4.

the P4 beats the P3 in everything you mentioned IF you have P4 code..

what you are saying is that the P4 should be able to do the same things as the P3 with P3 code and that is just not
right,

the whole point is that P4 is ground up new and this
need new P4 software to exploit its efficiency..
just as race cars when upgraded physically with a new engine part or better fuel etc must have their car computers reprogrammed to account for the new abilities
in order to maximize them..

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Kelledin

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The trouble with the provided benchmarks is that they're not apples-to-apples. Comparing the bandwidth of two different CPUs actually invalidates the tests as pure memory benchmarks; the benchmarks themselves show that even different components of one CPU (i.e. the Athlon integer unit vs. the Athlon FPU) throw around memory at different rates. It would be nice if we could find a DDR vs. RDRAM benchmark for the Pentium 4 by itself; sadly, I don't expect that to happen all too soon. So we'll all just have to speculate and wonder.

A little technical detail on the ServerSet III chipsets... I wasn't referring to the bandwidth of a single-channel PC133 system (which actually gets 1.06GB/sec peak bandwidth). I refer to the dual-channel and quad-channel ServerSet III chipsets, the ones with a peak theoretical bandwidth of 2.1GB/sec and 4.2GB/sec, respectively. They are essentially a RAID 0 for your memory; for accessing chunks of any decent size, the practical bandwidth increases because of interleaved access patterns across multiple channels. This solution thoroughly rips both DDR and RDRAM but understandably requires a massive trace count.

And referring to the Pentium 4's problems executing P3 code...may I call your attention to the Itanium? Its launch has turned out to be a quiet flop due to poor backwards compatibility. Or perhaps the old 80186? Intel got the bright idea to chuck backwards compatibility out the window completely. As a result, you can rarely ever expect to see an 80186 in existence anymore. If the CPU is going to be a general-purpose upgrade, backwards compatibility is important.

Don't get me wrong, there are things I like about the Pentium 4. I think the SSE2 register set is what Intel should have done to start with for the 8087, instead of implementing the stack-based x87 registers. The stack-based register model is a royal pain to code for in assembly and is next to impossible to pipeline; the only way Intel managed to pipeline the bloody thing was to make the FXCHG instruction free in some cases. All that aside, developers aren't ready to leave behind the old P3 code just yet. So regardless of how much I like the new FPU, the old one needs to perform just as well in the P4 for the same price if it's going to be worth my consideration.

It pains me every time, but I must bring this up. <i>Just because Intel makes or uses something, does not mean it is good.</i> I don't think I need to point out the recall fiascos Intel has had these past two years.


Kelledin
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Crashman

Polypheme
Former Staff
Now you clarify my point with a car analogy-even race cars all need to run the same fuel! You can't say at the end of a race "well, we lost the race because they made us use standard fuel". But a better analogy is sports sedans-they all need to run on pump gasoline! (Petrol, for the Brits out there). What good would it do to buy a new BMW that is supposed to go 50km/h faster than last years, on 98 Octane, if it only goes 50km/h slower than last years using premium grade pump gas? Do you think all the gas stations would add 98 Octane to their selections?

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HI YEah I know which chipset you meant and I agree pretty cool,
BUT the thing is all those traces and bandwidth on server set will bottleneck on current P3 as its memory bus is 133 mhz and 800 MPS, so it does not matter..

if it were on a p4 then the memory bus would be put to use at 400 mhz and 3.2 GPS ...

no good having 4 banks concurrent memory with 3.2 gps throughput on a P3, it is wasted,
that is all I was saying.

thanks for the input and ideas

best
CAMERON

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silverpig

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You have that all mixed up.

A P4 with DDR would (most likely) outperform a P4 with RDRAM if they had the same bandwidth due to DDR's LOWER latency.

Really love your peaches wanna shake your tree.