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Q about (ab)using a PC's parallel port

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Anonymous
a b à CPUs
June 22, 2004 2:02:04 AM

Archived from groups: comp.sys.ibm.pc.hardware.chips,sci.electronics.design (More info?)

Background: A co-worker came to me about a month ago and asked,
"I have this small, embedded PC with only three slots which are already
full but I need an interrupt from an external signal. What can I do?"
"No problem," said I, "you can use the printer port's interrupt."
"But I don't know how to do that. It's not DOS, it's running Windows
NT."
"No problem," said I again, "I'll just write a device driver for you."
And so I did. And it tested perfectly on my systems here and on the
embedded system using an interrupt-simulation box I built.

Then, the other day, I got a phone call while I was working on one of our
airplanes.
"We measured the PTTI signal and it's 0-10v. Will that be a problem
with the printer port?"

God bless them for actually measuring rather than just assuming
compatibility and connecting it up.

Anyway, a simple pair of 1K resistors solved the problem, but I got to
wondering. Exactly how much damage would it likely have done to get a
~15-30 microsecond wide, 10V pulse into the parallel port (pin 10 IIRC) at a
1 Hz rate? I realize that if the port were actually designed "properly"
with reversed-bias diodes to ground and +5v that it would probably have
worked for years without any real damage. BUT ... how many PC ports are
actually designed with that kind of safeguard?

Does anyone have any explicit knowledge or anecdotal evidence one way or the
other?

TIA
Norm

More about : parallel port

Anonymous
a b à CPUs
June 22, 2004 2:02:05 AM

Archived from groups: comp.sys.ibm.pc.hardware.chips,sci.electronics.design (More info?)

In article <wVIBc.13652$OB3.10082@bgtnsc05-news.ops.worldnet.att.net>,
ndrez@att.net says...
> Anyway, a simple pair of 1K resistors solved the problem, but I got to
> wondering. Exactly how much damage would it likely have done to get a
> ~15-30 microsecond wide, 10V pulse into the parallel port (pin 10 IIRC) at a
> 1 Hz rate? I realize that if the port were actually designed "properly"
> with reversed-bias diodes to ground and +5v that it would probably have
> worked for years without any real damage. BUT ... how many PC ports are
> actually designed with that kind of safeguard?
>
> Does anyone have any explicit knowledge or anecdotal evidence one way or the
> other?

PC printer ports are tough as nails. I doubt it would have hurt
anything.

(I knew a kid in high school who pulse-dialed a telephone line with a
PIA output from his Commodore 64. It actually worked. I would have
been less surprised to see it leaking holy water.)

-- jm

------------------------------------------------------
http://www.qsl.net/ke5fx
Note: My E-mail address has been altered to avoid spam
------------------------------------------------------
Anonymous
a b à CPUs
June 22, 2004 3:46:15 AM

Archived from groups: comp.sys.ibm.pc.hardware.chips,sci.electronics.design (More info?)

On Mon, 21 Jun 2004 22:02:04 GMT, "Norm Dresner" <ndrez@att.net>
wrote:

>Background: A co-worker came to me about a month ago and asked,
> "I have this small, embedded PC with only three slots which are already
>full but I need an interrupt from an external signal. What can I do?"
> "No problem," said I, "you can use the printer port's interrupt."
> "But I don't know how to do that. It's not DOS, it's running Windows
>NT."
> "No problem," said I again, "I'll just write a device driver for you."
>And so I did. And it tested perfectly on my systems here and on the
>embedded system using an interrupt-simulation box I built.
>
>Then, the other day, I got a phone call while I was working on one of our
>airplanes.
> "We measured the PTTI signal and it's 0-10v. Will that be a problem
>with the printer port?"
>
>God bless them for actually measuring rather than just assuming
>compatibility and connecting it up.
>
>Anyway, a simple pair of 1K resistors solved the problem, but I got to
>wondering. Exactly how much damage would it likely have done to get a
>~15-30 microsecond wide, 10V pulse into the parallel port (pin 10 IIRC) at a
>1 Hz rate? I realize that if the port were actually designed "properly"
>with reversed-bias diodes to ground and +5v that it would probably have
>worked for years without any real damage. BUT ... how many PC ports are
>actually designed with that kind of safeguard?

All the parallel-port expansion cards I've ever seen have about ten
capacitors, one between every line (I forget which direction, but
I'll guess input)and ground (or that's what the traces looked like).
These might be high enough value (like .001 or .01 uF) that a 15 uS
pulse through a 1k resistor might not even reach the proper level at
the pin.
Like others said, you're not going to hurt it. The problem is its
robust design may keep it from doing what you think it should do.

>Does anyone have any explicit knowledge or anecdotal evidence one way or the
>other?

There are surely schematics of parallel interfaces online...

>TIA
> Norm

-----
http://mindspring.com/~benbradley
Related resources
Anonymous
a b à CPUs
June 22, 2004 7:08:15 AM

Archived from groups: comp.sys.ibm.pc.hardware.chips,sci.electronics.design (More info?)

LPT ports used to be easily fried, if connected/disconnected while a printer
or PC are powered.

"Norm Dresner" <ndrez@att.net> wrote in message
news:wVIBc.13652$OB3.10082@bgtnsc05-news.ops.worldnet.att.net...
> Background: A co-worker came to me about a month ago and asked,
> "I have this small, embedded PC with only three slots which are
already
> full but I need an interrupt from an external signal. What can I do?"
> "No problem," said I, "you can use the printer port's interrupt."
> "But I don't know how to do that. It's not DOS, it's running Windows
> NT."
> "No problem," said I again, "I'll just write a device driver for you."
> And so I did. And it tested perfectly on my systems here and on the
> embedded system using an interrupt-simulation box I built.
>
> Then, the other day, I got a phone call while I was working on one of our
> airplanes.
> "We measured the PTTI signal and it's 0-10v. Will that be a problem
> with the printer port?"
>
> God bless them for actually measuring rather than just assuming
> compatibility and connecting it up.
>
> Anyway, a simple pair of 1K resistors solved the problem, but I got to
> wondering. Exactly how much damage would it likely have done to get a
> ~15-30 microsecond wide, 10V pulse into the parallel port (pin 10 IIRC) at
a
> 1 Hz rate? I realize that if the port were actually designed "properly"
> with reversed-bias diodes to ground and +5v that it would probably have
> worked for years without any real damage. BUT ... how many PC ports are
> actually designed with that kind of safeguard?
>
> Does anyone have any explicit knowledge or anecdotal evidence one way or
the
> other?
>
> TIA
> Norm
>
Anonymous
a b à CPUs
June 22, 2004 7:32:38 AM

Archived from groups: comp.sys.ibm.pc.hardware.chips,sci.electronics.design (More info?)

On Mon, 21 Jun 2004 22:02:04 GMT, "Norm Dresner" <ndrez@att.net> wrote:

>Background: A co-worker came to me about a month ago and asked,
> "I have this small, embedded PC with only three slots which are already
>full but I need an interrupt from an external signal. What can I do?"
> "No problem," said I, "you can use the printer port's interrupt."
> "But I don't know how to do that. It's not DOS, it's running Windows
>NT."
> "No problem," said I again, "I'll just write a device driver for you."
>And so I did. And it tested perfectly on my systems here and on the
>embedded system using an interrupt-simulation box I built.
>
>Then, the other day, I got a phone call while I was working on one of our
>airplanes.
> "We measured the PTTI signal and it's 0-10v. Will that be a problem
>with the printer port?"
>
>God bless them for actually measuring rather than just assuming
>compatibility and connecting it up.
>
>Anyway, a simple pair of 1K resistors solved the problem, but I got to
>wondering. Exactly how much damage would it likely have done to get a
>~15-30 microsecond wide, 10V pulse into the parallel port (pin 10 IIRC) at a
>1 Hz rate? I realize that if the port were actually designed "properly"
>with reversed-bias diodes to ground and +5v that it would probably have
>worked for years without any real damage. BUT ... how many PC ports are
>actually designed with that kind of safeguard?
>
>Does anyone have any explicit knowledge or anecdotal evidence one way or the
>other?

pin 10 would be the -ACK pin, a good choice as an external interrupt.
A Nat Semi PC87413 super io chip has a "ttl compatible" input with its well
firmly nailed to vdd (5V). They spec the max dc input voltage of 5.5v (@vdd =
5). Not much wiggle room on paper, they don't list exceptions for this type
io cell.

There are practical allowances for over/undershoot for pretty much every
technology I've ever used, but the time domain was usually in the five's of
nanoseconds, not tens of microseconds, and the voltage excursions were
measured in 10ths of volts, not 5 volts of overshoot.

In this case they'd have been whistling past the graveyard, I think ;-)

/daytripper
Anonymous
a b à CPUs
June 22, 2004 12:27:29 PM

Archived from groups: comp.sys.ibm.pc.hardware.chips,sci.electronics.design (More info?)

Alexander Grigoriev wrote:

> LPT ports used to be easily fried, if connected/disconnected while a printer
> or PC are powered.
>

That was what all the manuals said, but I think it was just arse
protection, unless the mains wiring was so primitive that earth levels
on adjacent sockets were wildly different.

Paul Burke
Anonymous
a b à CPUs
June 22, 2004 1:41:15 PM

Archived from groups: comp.sys.ibm.pc.hardware.chips,sci.electronics.design (More info?)

"Paul Burke" <paul@scazon.com> schreef in bericht
news:2jq55iF14aptuU2@uni-berlin.de...
> Alexander Grigoriev wrote:
>
> > LPT ports used to be easily fried, if connected/disconnected while a
printer
> > or PC are powered.
> >
>
> That was what all the manuals said, but I think it was just arse
> protection, unless the mains wiring was so primitive that earth levels
> on adjacent sockets were wildly different.

I ruined an on-board lpt1 port once, plugging in a printer. Perhaps
the printer wasn't grounded at all, and static discharge being the
culpritt. Bought a LPT isa card to 'fix' it.

--
Thanks, Frank.
(remove 'x' and 'invalid' when replying by email)
Anonymous
a b à CPUs
June 22, 2004 1:41:16 PM

Archived from groups: comp.sys.ibm.pc.hardware.chips,sci.electronics.design (More info?)

Frank Bemelman wrote:
> "Paul Burke" <paul@scazon.com> schreef in bericht
> news:2jq55iF14aptuU2@uni-berlin.de...
>
>>Alexander Grigoriev wrote:
>>
>>
>>>LPT ports used to be easily fried, if connected/disconnected while a
>
> printer
>
>>>or PC are powered.
>>>
>>
>>That was what all the manuals said, but I think it was just arse
>>protection, unless the mains wiring was so primitive that earth levels
>>on adjacent sockets were wildly different.
>
>
> I ruined an on-board lpt1 port once, plugging in a printer. Perhaps
> the printer wasn't grounded at all, and static discharge being the
> culpritt. Bought a LPT isa card to 'fix' it.
>

Reminds me of something that happened to some computers I was
in charge of in the mid 1990's. I had an Alpha-based server
running NT 3.51 - and no LPT on the server. When a techie
from Digital wanted to copy some stuff off a zip disk and onto
the server, he hooked up a parallel port Zip drive to a PC,
intending to copy stuff from the Zip onto one of the server's
shares.

He toasted three parallel ports on three different PCs before
he twigged to what he was doing. And no, he wasn't doing
hot connects - the PCs were spare network clients he pulled off
of my shelves.

Digital was extremely embarrassed and promptly replaced all
three PCs with significantly better ones. I was ready to fight
them if they tried to fob me off with some LPT cards, but
they didn't even try to do that.
Anonymous
a b à CPUs
June 22, 2004 2:20:31 PM

Archived from groups: comp.sys.ibm.pc.hardware.chips,sci.electronics.design (More info?)

On a sunny day (Tue, 22 Jun 2004 08:27:29 +0100) it happened Paul Burke
<paul@scazon.com> wrote in <2jq55iF14aptuU2@uni-berlin.de>:

>Alexander Grigoriev wrote:
>
>> LPT ports used to be easily fried, if connected/disconnected while a printer
>> or PC are powered.
>>
>
>That was what all the manuals said, but I think it was just arse
>protection, unless the mains wiring was so primitive that earth levels
>on adjacent sockets were wildly different.
>
>Paul Burke
>
Look, it says max 5V, so make it that.
Ports can be fried, these days it goes directly to the chipset.
Look up dataheet of chipset (if you can get it) and look at specs of input,
how they measured it.
Replacing mobo is expensive.
More expensive then designing in a good interface.
JP
Anonymous
a b à CPUs
June 22, 2004 4:02:01 PM

Archived from groups: comp.sys.ibm.pc.hardware.chips,sci.electronics.design (More info?)

daytripper wrote:

> pin 10 would be the -ACK pin, a good choice as an external interrupt.
> A Nat Semi PC87413 super io chip has a "ttl compatible" input with its well
> firmly nailed to vdd (5V). They spec the max dc input voltage of 5.5v (@vdd =
> 5). Not much wiggle room on paper, they don't list exceptions for this type
> io cell.

Such chips usually have protection diodes to Vdd built into the inputs,
hence the 5.5V limit (the diode starts to conduct there). The more
interesting spec is the maximum current through this diode, but that
info is not always given. It is not unreasonable to assume that they
will survive 10-20mA. Hence you can protect the input from overvoltage
by using an appropriate series resistor.

--
Cheers
Stefan
June 22, 2004 11:46:58 PM

Archived from groups: comp.sys.ibm.pc.hardware.chips,sci.electronics.design (More info?)

On Tue, 22 Jun 2004 12:02:01 +0200, Stefan Heinzmann
<stefan_heinzmann@yahoo.com> wrote:

>daytripper wrote:
>
>> pin 10 would be the -ACK pin, a good choice as an external interrupt.
>> A Nat Semi PC87413 super io chip has a "ttl compatible" input with its well
>> firmly nailed to vdd (5V). They spec the max dc input voltage of 5.5v (@vdd =
>> 5). Not much wiggle room on paper, they don't list exceptions for this type
>> io cell.
>
>Such chips usually have protection diodes to Vdd built into the inputs,
>hence the 5.5V limit (the diode starts to conduct there). The more
>interesting spec is the maximum current through this diode, but that
>info is not always given. It is not unreasonable to assume that they
>will survive 10-20mA. Hence you can protect the input from overvoltage
>by using an appropriate series resistor.

and in the absence of knowing for sure that there is an internal clamp diode,
I'd stick on an external schottky clamp.
Anonymous
a b à CPUs
June 22, 2004 11:46:59 PM

Archived from groups: comp.sys.ibm.pc.hardware.chips,sci.electronics.design (More info?)

budgie wrote:

> On Tue, 22 Jun 2004 12:02:01 +0200, Stefan Heinzmann
> <stefan_heinzmann@yahoo.com> wrote:
>
>
>>daytripper wrote:
>>
>>
>>>pin 10 would be the -ACK pin, a good choice as an external interrupt.
>>>A Nat Semi PC87413 super io chip has a "ttl compatible" input with its well
>>>firmly nailed to vdd (5V). They spec the max dc input voltage of 5.5v (@vdd =
>>>5). Not much wiggle room on paper, they don't list exceptions for this type
>>>io cell.
>>
>>Such chips usually have protection diodes to Vdd built into the inputs,
>>hence the 5.5V limit (the diode starts to conduct there). The more
>>interesting spec is the maximum current through this diode, but that
>>info is not always given. It is not unreasonable to assume that they
>>will survive 10-20mA. Hence you can protect the input from overvoltage
>>by using an appropriate series resistor.
>
>
> and in the absence of knowing for sure that there is an internal clamp diode,
> I'd stick on an external schottky clamp.

You can't without modifying the PC hardware since the 5V supply is not
available on the connector.

--
Cheers
Stefan
Anonymous
a b à CPUs
June 22, 2004 11:47:00 PM

Archived from groups: comp.sys.ibm.pc.hardware.chips,sci.electronics.design (More info?)

On Tue, 22 Jun 2004 16:28:39 +0200, the renowned Stefan Heinzmann
<stefan_heinzmann@yahoo.com> wrote:

>budgie wrote:
>
>> On Tue, 22 Jun 2004 12:02:01 +0200, Stefan Heinzmann
>> <stefan_heinzmann@yahoo.com> wrote:
>>
>>
>>>daytripper wrote:
>>>
>>>
>>>>pin 10 would be the -ACK pin, a good choice as an external interrupt.
>>>>A Nat Semi PC87413 super io chip has a "ttl compatible" input with its well
>>>>firmly nailed to vdd (5V). They spec the max dc input voltage of 5.5v (@vdd =
>>>>5). Not much wiggle room on paper, they don't list exceptions for this type
>>>>io cell.
>>>
>>>Such chips usually have protection diodes to Vdd built into the inputs,
>>>hence the 5.5V limit (the diode starts to conduct there). The more
>>>interesting spec is the maximum current through this diode, but that
>>>info is not always given. It is not unreasonable to assume that they
>>>will survive 10-20mA. Hence you can protect the input from overvoltage
>>>by using an appropriate series resistor.
>>
>>
>> and in the absence of knowing for sure that there is an internal clamp diode,
>> I'd stick on an external schottky clamp.
>
>You can't without modifying the PC hardware since the 5V supply is not
>available on the connector.

Yes, and the Schottky could form a path to put 10V on Vdd for the
whole computer if the series resistor was omitted or got shorted.

I think I'd prefer to see a BJT pulling down one of the lines with an
internal 4K7 pullup..

Best regards,
Spehro Pefhany
--
"it's the network..." "The Journey is the reward"
speff@interlog.com Info for manufacturers: http://www.trexon.com
Embedded software/hardware/analog Info for designers: http://www.speff.com
Anonymous
a b à CPUs
June 23, 2004 2:29:33 AM

Archived from groups: comp.sys.ibm.pc.hardware.chips,sci.electronics.design (More info?)

On Tue, 22 Jun 2004 12:02:01 +0200, Stefan Heinzmann
<stefan_heinzmann@yahoo.com> wrote:

>daytripper wrote:
>
>> pin 10 would be the -ACK pin, a good choice as an external interrupt.
>> A Nat Semi PC87413 super io chip has a "ttl compatible" input with its well
>> firmly nailed to vdd (5V). They spec the max dc input voltage of 5.5v (@vdd =
>> 5). Not much wiggle room on paper, they don't list exceptions for this type
>> io cell.
>
>Such chips usually have protection diodes to Vdd built into the inputs,
>hence the 5.5V limit (the diode starts to conduct there). The more
>interesting spec is the maximum current through this diode, but that
>info is not always given. It is not unreasonable to assume that they
>will survive 10-20mA. Hence you can protect the input from overvoltage
>by using an appropriate series resistor.

You're certainly free to exceed the vendor's specified Absolute Maximum Rating
for Vih. In the absence of any vendor information regarding the existence of
input clamp diodes, I'd definitely put external protection on those nets
- or just avoid exceeding the spec ;-)

/daytripper (fortunately, this specific subject is going the way of the dodo)
Anonymous
a b à CPUs
June 23, 2004 3:10:20 AM

Archived from groups: comp.sys.ibm.pc.hardware.chips,sci.electronics.design (More info?)

In sci.electronics.design Stefan Heinzmann <stefan_heinzmann@yahoo.com> wrote:
> budgie wrote:
>
>> On Tue, 22 Jun 2004 12:02:01 +0200, Stefan Heinzmann
>> <stefan_heinzmann@yahoo.com> wrote:
>>
>>
>>>daytripper wrote:
>>>
>>>
>>>>pin 10 would be the -ACK pin, a good choice as an external interrupt.
>>>>A Nat Semi PC87413 super io chip has a "ttl compatible" input with its well
>>>>firmly nailed to vdd (5V). They spec the max dc input voltage of 5.5v (@vdd =
>>>>5). Not much wiggle room on paper, they don't list exceptions for this type
>>>>io cell.
>>>
>>>Such chips usually have protection diodes to Vdd built into the inputs,
>>>hence the 5.5V limit (the diode starts to conduct there). The more
>>>interesting spec is the maximum current through this diode, but that
>>>info is not always given. It is not unreasonable to assume that they
>>>will survive 10-20mA. Hence you can protect the input from overvoltage
>>>by using an appropriate series resistor.
>>
>>
>> and in the absence of knowing for sure that there is an internal clamp diode,
>> I'd stick on an external schottky clamp.
>
> You can't without modifying the PC hardware since the 5V supply is not
> available on the connector.

5V zener.
Anonymous
a b à CPUs
June 23, 2004 7:04:23 AM

Archived from groups: comp.sys.ibm.pc.hardware.chips,sci.electronics.design (More info?)

"Paul Burke" <paul@scazon.com> wrote in message
news:2jq55iF14aptuU2@uni-berlin.de...
> Alexander Grigoriev wrote:
>
> > LPT ports used to be easily fried, if connected/disconnected while a
printer
> > or PC are powered.
> >
>
> That was what all the manuals said, but I think it was just arse
> protection, unless the mains wiring was so primitive that earth levels
> on adjacent sockets were wildly different.
>
> Paul Burke
>
I went through 2 or 3 combination boards (2 serial, 1 LPT) I think by
accidentally hot-plugging, or maybe by looking at them wrong. I worked
around it by building a little daughter board that replaced the
Chinese chip with the circuit right out of the IBM tech. Ref.
It worked for the rest of the life of the computer.

I also had to put an oscillator on the daughterboard, because the
Chinese lame chip had the clock for the UARTs on it. That was
kinda cool - a Pierce (or is it Clapp?) osc, with a hand-wound
collector choke.

Cheers!
Rich
Anonymous
a b à CPUs
June 23, 2004 1:23:21 PM

Archived from groups: comp.sys.ibm.pc.hardware.chips,sci.electronics.design (More info?)

"Norm Dresner" <ndrez@att.net> wrote in message news:<wVIBc.13652$OB3.10082@bgtnsc05-news.ops.worldnet.att.net>...

> Background: A co-worker came to me about a month ago and asked,

> "We measured the PTTI signal and it's 0-10v. Will that
> be a problem with the printer port?"

Several years ago, I was able to buy a used FIC PA-2007 mobo cheap
because its serial ports didn't work. I found that a couple of
surface mount capacitors in the circuit that converted between TTL and
serial port voltages were missing, and installing new capacitors fixed
them. But a few months later a friend of mine plugged or unplugged a
parallel printer while everything was turned on, and again the serial
port went bad, and those capacitors disappeared. The south bridge
handled both the parallel and serial ports, and new capacitors fixed
everything again.

Would it hurt to put a low-value resistor in series with the signal
line and a zener and a reverse diode for protection?
Anonymous
a b à CPUs
June 24, 2004 6:43:01 PM

Archived from groups: comp.sys.ibm.pc.hardware.chips,sci.electronics.design (More info?)

"larrymoencurly" <larrymoencurly@my-deja.com> wrote in message
news:755e968a.0406230823.3875336c@posting.google.com...
> "Norm Dresner" <ndrez@att.net> wrote in message
news:<wVIBc.13652$OB3.10082@bgtnsc05-news.ops.worldnet.att.net>...
>
> > Background: A co-worker came to me about a month ago and asked,
>
> > "We measured the PTTI signal and it's 0-10v. Will that
> > be a problem with the printer port?"
>
> Several years ago, I was able to buy a used FIC PA-2007 mobo cheap
> because its serial ports didn't work. I found that a couple of
> surface mount capacitors in the circuit that converted between TTL and
> serial port voltages were missing, and installing new capacitors fixed
> them. But a few months later a friend of mine plugged or unplugged a
> parallel printer while everything was turned on, and again the serial
> port went bad, and those capacitors disappeared. The south bridge
> handled both the parallel and serial ports, and new capacitors fixed
> everything again.
>
> Would it hurt to put a low-value resistor in series with the signal
> line and a zener and a reverse diode for protection?

If you read the rest of the OP, you'd have seen that the solution we adopted
was to put a resistive divider on the input signal to limit the PC's input
to 5v. In this particular application the input signal was not going to
change -- this was an embedded system and the signal source was a high
quality Inertial Navigation System's 1PPS output from its GPS receiver --
and I felt that it was a sufficient cure for the problem. Yes, there are
many more general solutions to be found -- and adding a zener would have
been one of them but considering the electronic sophistication of the person
who asked the question (if you have to ask if 10 v into the parallel port
presents a potential problem then you simply don't understand what's there),
trying to describe how to reverse bias a zener was impossible to do over the
phone. A solution to a problem not only has to fit the problem but the
people who will implement it.

Norm
June 24, 2004 7:59:31 PM

Archived from groups: comp.sys.ibm.pc.hardware.chips,sci.electronics.design (More info?)

On Tue, 22 Jun 2004 16:28:39 +0200, Stefan Heinzmann
<stefan_heinzmann@yahoo.com> wrote:

>budgie wrote:
>
>> On Tue, 22 Jun 2004 12:02:01 +0200, Stefan Heinzmann
>> <stefan_heinzmann@yahoo.com> wrote:
>>
>>
>>>daytripper wrote:
>>>
>>>
>>>>pin 10 would be the -ACK pin, a good choice as an external interrupt.
>>>>A Nat Semi PC87413 super io chip has a "ttl compatible" input with its well
>>>>firmly nailed to vdd (5V). They spec the max dc input voltage of 5.5v (@vdd =
>>>>5). Not much wiggle room on paper, they don't list exceptions for this type
>>>>io cell.
>>>
>>>Such chips usually have protection diodes to Vdd built into the inputs,
>>>hence the 5.5V limit (the diode starts to conduct there). The more
>>>interesting spec is the maximum current through this diode, but that
>>>info is not always given. It is not unreasonable to assume that they
>>>will survive 10-20mA. Hence you can protect the input from overvoltage
>>>by using an appropriate series resistor.
>>
>>
>> and in the absence of knowing for sure that there is an internal clamp diode,
>> I'd stick on an external schottky clamp.
>
>You can't without modifying the PC hardware since the 5V supply is not
>available on the connector.

I do so much port interfacing here that all the PC's have the +5 and +12 supply
rails extended to support external devices. I have taken it for granted, and
keep forgetting that this is not everyone's MO.

So it's a 5v1 zener clamp and a series resistor, OR tie the clamp diode to an
external +5 rail if there is one in the connected hardware. After all, it
doesn't have to be the internal 5V rail to clamp excursions, as long as they
share a common reference rail eg 0V.
Anonymous
a b à CPUs
June 24, 2004 7:59:32 PM

Archived from groups: comp.sys.ibm.pc.hardware.chips,sci.electronics.design (More info?)

budgie wrote:

> On Tue, 22 Jun 2004 16:28:39 +0200, Stefan Heinzmann
> <stefan_heinzmann@yahoo.com> wrote:
>
>
>>budgie wrote:
>>
>>
>>>On Tue, 22 Jun 2004 12:02:01 +0200, Stefan Heinzmann
>>><stefan_heinzmann@yahoo.com> wrote:
>>>
>>>
>>>
>>>>daytripper wrote:
>>>>
>>>>
>>>>
>>>>>pin 10 would be the -ACK pin, a good choice as an external interrupt.
>>>>>A Nat Semi PC87413 super io chip has a "ttl compatible" input with its well
>>>>>firmly nailed to vdd (5V). They spec the max dc input voltage of 5.5v (@vdd =
>>>>>5). Not much wiggle room on paper, they don't list exceptions for this type
>>>>>io cell.
>>>>
>>>>Such chips usually have protection diodes to Vdd built into the inputs,
>>>>hence the 5.5V limit (the diode starts to conduct there). The more
>>>>interesting spec is the maximum current through this diode, but that
>>>>info is not always given. It is not unreasonable to assume that they
>>>>will survive 10-20mA. Hence you can protect the input from overvoltage
>>>>by using an appropriate series resistor.
>>>
>>>
>>>and in the absence of knowing for sure that there is an internal clamp diode,
>>>I'd stick on an external schottky clamp.
>>
>>You can't without modifying the PC hardware since the 5V supply is not
>>available on the connector.
>
>
> I do so much port interfacing here that all the PC's have the +5 and +12 supply
> rails extended to support external devices. I have taken it for granted, and
> keep forgetting that this is not everyone's MO.
>
> So it's a 5v1 zener clamp and a series resistor, OR tie the clamp diode to an
> external +5 rail if there is one in the connected hardware. After all, it
> doesn't have to be the internal 5V rail to clamp excursions, as long as they
> share a common reference rail eg 0V.

A 5V1 zener clamp is not equivalent to clamping the signal to the PC's
5V rail with a diode. Just think about what happens when the PC is
switched off with the external device still on. The original IBM
implementation of the parallel port used TTL logic chips (LS series).
These do clamp the input signals to the rails, so feeding in 5V with the
PC turned off could harm the PC. Contemporary interface chips may be
implemented differently, they might be able to tolerate 5V regardless of
whether they are being powered or not.

If you're not depending on maximum speed you may resort to a solution
others have proposed, namely to rely on the ACK pin being pulled up in
the PC, and using an open collector driver (or just a transistor) to
drive it.

--
Cheers
Stefan
Anonymous
a b à CPUs
June 24, 2004 11:16:49 PM

Archived from groups: comp.sys.ibm.pc.hardware.chips,sci.electronics.design (More info?)

On Mon, 21 Jun 2004 22:02:04 GMT, "Norm Dresner" <ndrez@att.net> put
finger to keyboard and composed:

>Background: A co-worker came to me about a month ago and asked,
> "I have this small, embedded PC with only three slots which are already
>full but I need an interrupt from an external signal. What can I do?"
> "No problem," said I, "you can use the printer port's interrupt."
> "But I don't know how to do that. It's not DOS, it's running Windows
>NT."
> "No problem," said I again, "I'll just write a device driver for you."
>And so I did. And it tested perfectly on my systems here and on the
>embedded system using an interrupt-simulation box I built.
>
>Then, the other day, I got a phone call while I was working on one of our
>airplanes.
> "We measured the PTTI signal and it's 0-10v. Will that be a problem
>with the printer port?"
>
>God bless them for actually measuring rather than just assuming
>compatibility and connecting it up.
>
>Anyway, a simple pair of 1K resistors solved the problem, but I got to
>wondering. Exactly how much damage would it likely have done to get a
>~15-30 microsecond wide, 10V pulse into the parallel port (pin 10 IIRC) at a
>1 Hz rate? I realize that if the port were actually designed "properly"
>with reversed-bias diodes to ground and +5v that it would probably have
>worked for years without any real damage. BUT ... how many PC ports are
>actually designed with that kind of safeguard?
>
>Does anyone have any explicit knowledge or anecdotal evidence one way or the
>other?
>
>TIA
> Norm

The original IBM AT serial/parallel adapter has an internal pullup
resistor on the -ACK input. Measuring the voltage on pin 10 should
confirm if it is tied to +5V or if it is floating. I can't imagine it
would be floating, as this could generate spurious interrupts (?).
Assuming pin 10 is pulled up to +5V, I would then use an optocoupler
(eg 4N2x) to provide isolation between your PC and your signal source,
for total peace of mind, and to avoid earth loops, etc.


- Franc Zabkar
--
Please remove one 's' from my address when replying by email.
June 25, 2004 1:10:01 PM

Archived from groups: comp.sys.ibm.pc.hardware.chips,sci.electronics.design (More info?)

On Thu, 24 Jun 2004 11:39:00 +0200, Stefan Heinzmann
<stefan_heinzmann@yahoo.com> wrote:

>budgie wrote:
>
>> On Tue, 22 Jun 2004 16:28:39 +0200, Stefan Heinzmann
>> <stefan_heinzmann@yahoo.com> wrote:
>>
>>
>>>budgie wrote:
>>>
>>>
>>>>On Tue, 22 Jun 2004 12:02:01 +0200, Stefan Heinzmann
>>>><stefan_heinzmann@yahoo.com> wrote:
>>>>
>>>>
>>>>
>>>>>daytripper wrote:
>>>>>
>>>>>
>>>>>
>>>>>>pin 10 would be the -ACK pin, a good choice as an external interrupt.
>>>>>>A Nat Semi PC87413 super io chip has a "ttl compatible" input with its well
>>>>>>firmly nailed to vdd (5V). They spec the max dc input voltage of 5.5v (@vdd =
>>>>>>5). Not much wiggle room on paper, they don't list exceptions for this type
>>>>>>io cell.
>>>>>
>>>>>Such chips usually have protection diodes to Vdd built into the inputs,
>>>>>hence the 5.5V limit (the diode starts to conduct there). The more
>>>>>interesting spec is the maximum current through this diode, but that
>>>>>info is not always given. It is not unreasonable to assume that they
>>>>>will survive 10-20mA. Hence you can protect the input from overvoltage
>>>>>by using an appropriate series resistor.
>>>>
>>>>
>>>>and in the absence of knowing for sure that there is an internal clamp diode,
>>>>I'd stick on an external schottky clamp.
>>>
>>>You can't without modifying the PC hardware since the 5V supply is not
>>>available on the connector.
>>
>>
>> I do so much port interfacing here that all the PC's have the +5 and +12 supply
>> rails extended to support external devices. I have taken it for granted, and
>> keep forgetting that this is not everyone's MO.
>>
>> So it's a 5v1 zener clamp and a series resistor, OR tie the clamp diode to an
>> external +5 rail if there is one in the connected hardware. After all, it
>> doesn't have to be the internal 5V rail to clamp excursions, as long as they
>> share a common reference rail eg 0V.
>
>A 5V1 zener clamp is not equivalent to clamping the signal to the PC's
>5V rail with a diode. Just think about what happens when the PC is
>switched off with the external device still on. The original IBM
>implementation of the parallel port used TTL logic chips (LS series).
>These do clamp the input signals to the rails, so feeding in 5V with the
>PC turned off could harm the PC. Contemporary interface chips may be
>implemented differently, they might be able to tolerate 5V regardless of
>whether they are being powered or not.

Maybe we are talking of different configurations here. With a diode clamp to an
external 5V rail (not PC-derived) I would be using a resistor on the signal
input (obviously) and one between the clamp point and the PC input pin. Any
risk of PC damage is mitigated by that resistor limiting current into the
de-powered PC post.

>If you're not depending on maximum speed you may resort to a solution
>others have proposed, namely to rely on the ACK pin being pulled up in
>the PC, and using an open collector driver (or just a transistor) to
>drive it.

I use the PC-derived rails on my in-house projects.
Anonymous
a b à CPUs
June 27, 2004 9:51:35 AM

Archived from groups: comp.sys.ibm.pc.hardware.chips,sci.electronics.design (More info?)

On Thu, 24 Jun 2004 14:43:01 GMT, "Norm Dresner" <ndrez@att.net> put
finger to keyboard and composed:

>If you read the rest of the OP, you'd have seen that the solution we adopted
>was to put a resistive divider on the input signal to limit the PC's input
>to 5v. In this particular application the input signal was not going to
>change -- this was an embedded system and the signal source was a high
>quality Inertial Navigation System's 1PPS output from its GPS receiver --
>and I felt that it was a sufficient cure for the problem. Yes, there are
>many more general solutions to be found -- and adding a zener would have
>been one of them but considering the electronic sophistication of the person
>who asked the question (if you have to ask if 10 v into the parallel port
>presents a potential problem then you simply don't understand what's there),
>trying to describe how to reverse bias a zener was impossible to do over the
>phone. A solution to a problem not only has to fit the problem but the
>people who will implement it.
>
> Norm

IMO the resistive divider solution is a poor one. If the -ACK pin is
tied high, then the pullup resistor will prevent the input from
switching all the way to ground. The original IBM AT had two 4K7
pullup resistors in parallel, resulting in an effective resistance of
2K35. Let's assume you use two 2K2 resistors in your divider. In this
case the low voltage at the -ACK input will be 1100 / (1100 + 2350) *
5 = 1.59V. This value is in TTL limbo. Of course you could experiment
until you get the numbers "right", but your solution won't necessarily
be portable.


- Franc Zabkar
--
Please remove one 's' from my address when replying by email.
Anonymous
a b à CPUs
June 28, 2004 9:13:15 PM

Archived from groups: comp.sys.ibm.pc.hardware.chips,sci.electronics.design (More info?)

"Franc Zabkar" <fzabkar@optussnet.com.au> wrote in message
news:o kiqd05kkstot1ep2qip1ka76eis79lgcr@4ax.com...
> On Thu, 24 Jun 2004 14:43:01 GMT, "Norm Dresner" <ndrez@att.net> put
> finger to keyboard and composed:
>
> >If you read the rest of the OP, you'd have seen that the solution we
adopted
> >was to put a resistive divider on the input signal to limit the PC's
input
> >to 5v. In this particular application the input signal was not going to
> >change -- this was an embedded system and the signal source was a high
> >quality Inertial Navigation System's 1PPS output from its GPS receiver --
> >and I felt that it was a sufficient cure for the problem. Yes, there are
> >many more general solutions to be found -- and adding a zener would have
> >been one of them but considering the electronic sophistication of the
person
> >who asked the question (if you have to ask if 10 v into the parallel port
> >presents a potential problem then you simply don't understand what's
there),
> >trying to describe how to reverse bias a zener was impossible to do over
the
> >phone. A solution to a problem not only has to fit the problem but the
> >people who will implement it.
> >
> > Norm
>
> IMO the resistive divider solution is a poor one. If the -ACK pin is
> tied high, then the pullup resistor will prevent the input from
> switching all the way to ground. The original IBM AT had two 4K7
> pullup resistors in parallel, resulting in an effective resistance of
> 2K35. Let's assume you use two 2K2 resistors in your divider. In this
> case the low voltage at the -ACK input will be 1100 / (1100 + 2350) *
> 5 = 1.59V. This value is in TTL limbo. Of course you could experiment
> until you get the numbers "right", but your solution won't necessarily
> be portable.
>
>

You've obviously ignored the statement that this is not a general solution
but was dependent on the particulars of the specific implementation. The
device that was connected directly to the output port of another device whic
h switched its output between (very close to) zero and 10v. This was not
connected to an "original IBM AT" and I doubt that the ASIC on the
motherboard in the embedded computer had much of anything in the way of
resistors but if it did it was inside a CMOS ASIC and it's very unlikely
that the resistance was much lower than several 10's of K Ohms.

But the actual proof that it was the right solution is that
a) the programmer who I described it to over the telephone was able to
implement it
b) it not only worked, but has been working AFAIK 24 hours a day for the
last two weeks.
I'm not going to ask much more of a solution that that kind of performance
in this situation.

I certainly could have created several sophisticated protection circuits if
I was the one doing the implementation in my laboratory. I wasn't and there
was no opportunity for me to do it from the airplane where I was working. I
could have relied on the programmer finding a suitable digital engineer as a
guide but I wasn't willing to take that chance either. "Two 1K or 2K
resistors in series between the input signal and ground and the port
connected to their middle junction" was adequate under the circumstances.

And, for the record, my OP didn't ask how to solve the problem -- it simply
asked if anyone knew how much damage would have beed done if the 10v were
connected directly to the parallel port. While I wasn't aware of any
"industry-wide specification" for the port, I'm not a motherboard designer
and don't know their common practices. I also wasn't going to take one of
my own computers and connect it to a 10v supply to see what happened.

Norm
!