Athlon64 Spanks P4 in 90nm Power Consumption tests

Archived from groups: alt.comp.hardware.overclocking.amd,alt.comp.hardware.overclocking,comp.sys.ibm.pc.hardware.chips (More info?)

http://techreport.com/ja.zz?comments=7417

rms
20 answers Last reply
More about athlon64 spanks 90nm power consumption tests
  1. Archived from groups: alt.comp.hardware.overclocking.amd,alt.comp.hardware.overclocking,comp.sys.ibm.pc.hardware.chips (More info?)

    hence the reason why Intel are going to go back to the old P3 design
    soon.......

    --
    From Adam Webb, Overlag

    "rms" <rsquires@flashREMOVE.net> wrote in message
    news:B8e8d.3587$5b1.2113@newssvr17.news.prodigy.com...
    > http://techreport.com/ja.zz?comments=7417
    >
    > rms
    >
    >


    ---
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    Checked by AVG anti-virus system (http://www.grisoft.com).
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  2. Archived from groups: alt.comp.hardware.overclocking.amd,alt.comp.hardware.overclocking,comp.sys.ibm.pc.hardware.chips (More info?)

    On Tue, 5 Oct 2004 11:00:50 +0100, "Adam Webb"
    <adam@ajmysecondname.eclipse.co.uk> wrote:

    >hence the reason why Intel are going to go back to the old P3 design
    >soon.......

    Which they're going to have to do an AMD64 for... all over again. The
    troubles with Dothan would perhaps indicate that they also have some more
    work to do on their process.

    >From Adam Webb, Overlag
    >
    >"rms" <rsquires@flashREMOVE.net> wrote in message
    >news:B8e8d.3587$5b1.2113@newssvr17.news.prodigy.com...
    >> http://techreport.com/ja.zz?comments=7417
    >>

    Rgds, George Macdonald

    "Just because they're paranoid doesn't mean you're not psychotic" - Who, me??
  3. Archived from groups: alt.comp.hardware.overclocking.amd,alt.comp.hardware.overclocking,comp.sys.ibm.pc.hardware.chips (More info?)

    rms wrote:

    > http://techreport.com/ja.zz?comments=7417
    >
    > rms
    >
    >

    The results sound awful. I wonder what they actually used to measure the
    wattage?
  4. Archived from groups: alt.comp.hardware.overclocking.amd,alt.comp.hardware.overclocking,comp.sys.ibm.pc.hardware.chips (More info?)

    They've amended the results. Not as good as thought. Gets hotter this time.

    http://www.sudhian.com/showdocs.cfm?aid=610

    --
    Ed Light

    Smiley :-/
    MS Smiley :-\

    Send spam to the FTC at
    uce@ftc.gov
    Thanks, robots.
  5. Archived from groups: alt.comp.hardware.overclocking.amd,alt.comp.hardware.overclocking,comp.sys.ibm.pc.hardware.chips (More info?)

    On Wed, 6 Oct 2004 09:41:44 -0700, "Ed Light" <nobody@nobody.there>
    wrote:
    >
    >They've amended the results. Not as good as thought. Gets hotter this time.
    >
    >http://www.sudhian.com/showdocs.cfm?aid=610

    Hmm.. an overclocked processor runs hotter than one that is not
    overclocked...

    And they are surprised by the results?!?!

    The wonders will never cease..

    -------------
    Tony Hill
    hilla <underscore> 20 <at> yahoo <dot> ca
  6. Archived from groups: alt.comp.hardware.overclocking.amd,alt.comp.hardware.overclocking,comp.sys.ibm.pc.hardware.chips (More info?)

    Nadeem wrote:
    > rms wrote:
    >
    >> http://techreport.com/ja.zz?comments=7417
    >>
    >> rms
    >>
    >>
    >
    > The results sound awful. I wonder what they actually used to measure
    > the wattage?

    Presumably one of the many household-appliance-power-meter things. There's a
    difference between running hot and being power hungry. The Prescott is both
    (ie: runs hotter and uses more power than the Northwood), but judging from
    these results the 90nm A64's are less power-hungry than the 130nm parts. The
    jury appears to still be out on whether it runs hotter or not.

    What really needs to be done is for someone (TectReport would be good, since
    they already have a 90nm 3500+) to test the chips at a large range of
    frequencies and plot the results. If the results look like (view with fixed
    width font):

    Power
    usage
    ^
    | **
    | **
    | ***
    | ****
    | **** +
    | **** +
    | 130nm **** ++
    | ***** ++
    |***** +++
    | +++
    | ++++
    | +++++
    |+++++
    | 90nm
    |
    |
    |
    +-------------------------------------->
    Speed

    Then clearly AMD is going to be having the same problem as Intel scaling the
    CPUs to higher speeds. Intel's additional problem was that the Prescott
    started out being more power hungy even at the far left hand side of the
    graph. AMD doesn't have this problem, so may be able to ramp better than
    Intel has with the Prescott. The key thing to look at is if the power usage
    for 90nm parts ever gets above that of 130nm parts. We now know that at
    lower speeds, 90nm parts consume less power. So, if they ever get to the
    point of crossing the 130nm part line (as shown in the ascii graph), then
    it's fairly likely that they're going to hit the wall quicker than the
    130's.

    --
    Michael Brown
    www.emboss.co.nz : OOS/RSI software and more :)
    Add michael@ to emboss.co.nz - My inbox is always open
  7. Archived from groups: alt.comp.hardware.overclocking.amd,alt.comp.hardware.overclocking,comp.sys.ibm.pc.hardware.chips (More info?)

    Tony Hill <hilla_nospam_20@yahoo.ca> writes:

    > And they are surprised by the results?!?!

    And the second article is only about CPU temperature, not
    power consumption.

    Usual braindead journalist stuff...
  8. Archived from groups: alt.comp.hardware.overclocking.amd,alt.comp.hardware.overclocking,comp.sys.ibm.pc.hardware.chips (More info?)

    "Michael Brown" <see@signature.below> wrote in message
    news:Zu49d.10657$JQ4.704492@news.xtra.co.nz...
    > Nadeem wrote:
    > > rms wrote:
    > >
    > >> http://techreport.com/ja.zz?comments=7417
    > >>
    > >> rms
    > >>
    > >>
    > >
    > > The results sound awful. I wonder what they actually used to measure
    > > the wattage?
    >
    > Presumably one of the many household-appliance-power-meter things. There's
    a
    > difference between running hot and being power hungry. The Prescott is
    both
    > (ie: runs hotter and uses more power than the Northwood), but judging from
    > these results the 90nm A64's are less power-hungry than the 130nm parts.
    The
    > jury appears to still be out on whether it runs hotter or not.
    >
    > What really needs to be done is for someone (TectReport would be good,
    since
    > they already have a 90nm 3500+) to test the chips at a large range of
    > frequencies and plot the results. If the results look like (view with
    fixed
    > width font):
    >
    > Power
    > usage
    > ^
    > | **
    > | **
    > | ***
    > | ****
    > | **** +
    > | **** +
    > | 130nm **** ++
    > | ***** ++
    > |***** +++
    > | +++
    > | ++++
    > | +++++
    > |+++++
    > | 90nm
    > |
    > |
    > |
    > +-------------------------------------->
    > Speed

    Power consumption of CMOS is _proportional_ to core frequency.
    Therefore the chart is likely to be something like this:


    Power
    ^
    | **
    | ** ++
    | **++
    | **+
    | **
    | 90nm +**
    | ++**
    | ++ **
    | ++ **
    | ++ **
    |++ **
    | **
    |**
    | 130nm
    |
    |
    |
    |
    |
    +------------------------------------------>
    0 Speed

    Regards
    - aap
  9. Archived from groups: alt.comp.hardware.overclocking.amd,alt.comp.hardware.overclocking,comp.sys.ibm.pc.hardware.chips (More info?)

    On Sun, 10 Oct 2004 19:13:46 +0000, alexi wrote:

    >
    > "Michael Brown" <see@signature.below> wrote in message
    > news:Zu49d.10657$JQ4.704492@news.xtra.co.nz...
    >> Nadeem wrote:
    >> > rms wrote:
    >> >
    >> >> http://techreport.com/ja.zz?comments=7417
    >> >>
    >> >> rms
    >> >>
    >> >>
    >> >
    >> > The results sound awful. I wonder what they actually used to measure
    >> > the wattage?
    >>
    >> Presumably one of the many household-appliance-power-meter things. There's
    > a
    >> difference between running hot and being power hungry. The Prescott is
    > both
    >> (ie: runs hotter and uses more power than the Northwood), but judging from
    >> these results the 90nm A64's are less power-hungry than the 130nm parts.
    > The
    >> jury appears to still be out on whether it runs hotter or not.
    >>
    >> What really needs to be done is for someone (TectReport would be good,
    > since
    >> they already have a 90nm 3500+) to test the chips at a large range of
    >> frequencies and plot the results. If the results look like (view with
    > fixed
    >> width font):

    <graph snipped>

    >
    > Power consumption of CMOS is _proportional_ to core frequency.
    > Therefore the chart is likely to be something like this:

    Not at *all* true. Active power consumption is proportional to frequency
    times voltage *squared*. You assume voltage is a constant; it's not. You
    also ignore leakage, which is an even higher-order issue, WRT voltage.
    We're not in the 20th century, Toto.

    > Power
    > ^
    > | **
    > | ** ++
    > | **++
    > | **+
    > | **
    > | 90nm +**
    > | ++**
    > | ++ **
    > | ++ **
    > | ++ **
    > |++ **
    > | **
    > |**
    > | 130nm
    > |
    > |
    > |
    > |
    > |
    > +------------------------------------------> 0
    > Speed

    Would it be nice if life were simple again. ...and June had the meal on
    the table when the Ward came home...

    --
    Keith
  10. Archived from groups: alt.comp.hardware.overclocking.amd,alt.comp.hardware.overclocking,comp.sys.ibm.pc.hardware.chips (More info?)

    "alexi" <apredtechenski@austin.rr.com> wrote:

    >Dear student Keith with severe deficit of attention, you said:

    I foresee a flame, in your future.
  11. Archived from groups: alt.comp.hardware.overclocking.amd,alt.comp.hardware.overclocking,comp.sys.ibm.pc.hardware.chips (More info?)

    On Mon, 11 Oct 2004 07:41:13 -0500, chrisv wrote:

    > "alexi" <apredtechenski@austin.rr.com> wrote:
    >
    >>Dear student Keith with severe deficit of attention, you said:
    >
    > I foresee a flame, in your future.

    Yeah, easy pickin's though.

    --
    Keith
  12. Archived from groups: alt.comp.hardware.overclocking.amd,alt.comp.hardware.overclocking,comp.sys.ibm.pc.hardware.chips (More info?)

    "chrisv" <chrisv@nospam.invalid> wrote in message
    news:7qvkm0p7ue2ckki6bfnvitiqcc05ke177f@4ax.com...
    > "alexi" <apredtechenski@austin.rr.com> wrote:
    >
    > >Dear student Keith with severe deficit of attention, you said:
    >
    > I foresee a flame, in your future.

    I'am sorry, I didn't mean to offend one of the senior netizens
    of this netgroup, just his unwaranted jump on my humble remark
    sounded so "studentish". Next time I will research the posting
    history and act accordingly :-)

    - aap
  13. Archived from groups: alt.comp.hardware.overclocking.amd,alt.comp.hardware.overclocking,comp.sys.ibm.pc.hardware.chips (More info?)

    On Tue, 12 Oct 2004 02:48:23 +0000, alexi wrote:

    >
    > "chrisv" <chrisv@nospam.invalid> wrote in message
    > news:7qvkm0p7ue2ckki6bfnvitiqcc05ke177f@4ax.com...
    >> "alexi" <apredtechenski@austin.rr.com> wrote:
    >>
    >> >Dear student Keith with severe deficit of attention, you said:
    >>
    >> I foresee a flame, in your future.
    >
    > I'am sorry, I didn't mean to offend one of the senior netizens
    > of this netgroup, just his unwaranted jump on my humble remark
    > sounded so "studentish". Next time I will research the posting
    > history and act accordingly :-)

    No offense taken. We're all here to learn. However, it *is*
    more interesting to learn from those who actually know something. Perhaps
    you want to clarify your position? Nah...

    --
    Keith
  14. Archived from groups: alt.comp.hardware.overclocking.amd,alt.comp.hardware.overclocking,comp.sys.ibm.pc.hardware.chips (More info?)

    "keith" <krw@att.bizzzz> wrote in message
    news:pan.2004.10.12.02.22.33.878067@att.bizzzz...

    > Kidz. Cannot read and will never listen.
    ....
    > You're ignorant too. It may have been a constant a dozen years ago, and
    > perhaps even five. It certainly isn't today. Nothing is a constant.
    ....
    > Your simpleton formula ignores all reality. (see: leakage)
    .....
    > You really ought to argue with somone who hasn't been here. You simply
    > don't have a clue.
    .....
    > Ok, I'll be nice and let you show your wonderous experience; how do *you*
    > arrive at your wonderous graph for a *SINGLE* model of processor?
    >
    > ...the voltage doesn't vary, please!
    ....
    > Bullshit. You haven't a clue.
    ....
    > *I* need do nothing. I'm not the newb here. I *do* this for a living.
    > You need to listen more and talk less ("what good is ignorance, unless you
    > demonstate it").
    ....
    > Oh, my!
    >
    > Perhaps you want to 'splain your credentials Lucy? (...no don't you'll
    > look even more foolish)
    >
    > --
    > Keith
    >

    I appreciate your deeply-thought response (summarized above).
    I think nobody should hit senior netizens and self-taught amateurs,
    so I will limit myself to humble submission of my credentials,
    although I do realize it might look foolish:

    http://home.austin.rr.com/bah/

    Have a nice day,

    - aap


    >
  15. Archived from groups: alt.comp.hardware.overclocking.amd,alt.comp.hardware.overclocking,comp.sys.ibm.pc.hardware.chips (More info?)

    keith wrote:

    > *I* need do nothing. I'm not the newb here. I *do* this for a living.

    Umm ... shouldn't that be past tense ?
    "Did" instead of "do" ?
    Thought I read something quite a while back about your
    imminent retirement ?
  16. Archived from groups: alt.comp.hardware.overclocking.amd,alt.comp.hardware.overclocking,comp.sys.ibm.pc.hardware.chips (More info?)

    On Tue, 12 Oct 2004 04:19:21 +0000, Rob Stow wrote:

    > keith wrote:
    >
    >> *I* need do nothing. I'm not the newb here. I *do* this for a living.
    >
    > Umm ... shouldn't that be past tense ?
    > "Did" instead of "do" ?

    Nope. Still learning new stuff.

    > Thought I read something quite a while back about your
    > imminent retirement ?

    Not yet. I'm still in there, just crossed the threshold where it's my
    choice which pocket I want to get paid from. OTOH, another bad
    winter, after the summer that never happened, might convince me to think
    again. ...consideration given to good offers. ;-)

    --
    Keith
  17. Archived from groups: alt.comp.hardware.overclocking.amd,alt.comp.hardware.overclocking,comp.sys.ibm.pc.hardware.chips (More info?)

    keith wrote:
    > alexi wrote:
    >> Michael Brown wrote:
    >>> Nadeem wrote:
    >>>> rms wrote:
    >>>>
    >>>>> http://techreport.com/ja.zz?comments=7417
    >>>>
    >>>> The results sound awful. I wonder what they actually used to
    >>>> measure the wattage?
    >>>
    >>> Presumably one of the many household-appliance-power-meter things.
    >>> There's a difference between running hot and being power hungry.
    >>> The Prescott is both (ie: runs hotter and uses more power than the
    >>> Northwood), but judging from these results the 90nm A64's are less
    >>> power-hungry than the 130nm parts. The jury appears to still be out
    >>> on whether it runs hotter or not.
    >>>
    >>> What really needs to be done is for someone (TectReport would be
    >>> good, since they already have a 90nm 3500+) to test the chips at a
    >>> large range of frequencies and plot the results. If the results
    >>> look like (view with fixed width font):
    >
    > <graph snipped>
    >
    >> Power consumption of CMOS is _proportional_ to core frequency.
    >> Therefore the chart is likely to be something like this:
    >
    > Not at *all* true. Active power consumption is proportional to
    > frequency times voltage *squared*. You assume voltage is a constant;
    > it's not. You also ignore leakage, which is an even higher-order
    > issue, WRT voltage. We're not in the 20th century, Toto.

    If you've got a few minutes, there's a couple things I'd like clarification
    on ... My original graph was drawn on the basis that in modern CPUs, nothing
    is ever so nice as to go bad in only a linear way :) The only transistor
    physics I have done is for low frequency and theoretical transistors (and
    from a physics as opposed to engineering point of view) in which case the
    power usage is proportional to the switching frequency, all other things
    remaining equal. Assumimg also that modern CPUs are FET-like instead of
    bipolar.

    What actually happens in the *real* world? Assuming voltage remains
    constant, how non-linear (with respect to frequency) is a transistor in the
    range that it's typically being pushed in a modern CPU? And what is the main
    contributor to that non-lineararity?

    [...]

    --
    Michael Brown
    www.emboss.co.nz : OOS/RSI software and more :)
    Add michael@ to emboss.co.nz - My inbox is always open
  18. Archived from groups: alt.comp.hardware.overclocking.amd,alt.comp.hardware.overclocking,comp.sys.ibm.pc.hardware.chips (More info?)

    On Tue, 12 Oct 2004 21:34:06 +1300, Michael Brown wrote:

    > keith wrote:
    >> alexi wrote:
    >>> Michael Brown wrote:
    >>>> Nadeem wrote:
    >>>>> rms wrote:
    >>>>>
    >>>>>> http://techreport.com/ja.zz?comments=7417
    >>>>>
    >>>>> The results sound awful. I wonder what they actually used to
    >>>>> measure the wattage?
    >>>>
    >>>> Presumably one of the many household-appliance-power-meter things.
    >>>> There's a difference between running hot and being power hungry.
    >>>> The Prescott is both (ie: runs hotter and uses more power than the
    >>>> Northwood), but judging from these results the 90nm A64's are less
    >>>> power-hungry than the 130nm parts. The jury appears to still be out
    >>>> on whether it runs hotter or not.
    >>>>
    >>>> What really needs to be done is for someone (TectReport would be
    >>>> good, since they already have a 90nm 3500+) to test the chips at a
    >>>> large range of frequencies and plot the results. If the results
    >>>> look like (view with fixed width font):
    >>
    >> <graph snipped>
    >>
    >>> Power consumption of CMOS is _proportional_ to core frequency.
    >>> Therefore the chart is likely to be something like this:
    >>
    >> Not at *all* true. Active power consumption is proportional to
    >> frequency times voltage *squared*. You assume voltage is a constant;
    >> it's not. You also ignore leakage, which is an even higher-order
    >> issue, WRT voltage. We're not in the 20th century, Toto.
    >
    > If you've got a few minutes,

    Sure, that's why we're here, eh? ;-)

    > there's a couple things I'd like clarification
    > on ... My original graph was drawn on the basis that in modern CPUs, nothing
    > is ever so nice as to go bad in only a linear way :)

    The more things stay the same... ;-)

    > The only transistor
    > physics I have done is for low frequency and theoretical transistors (and
    > from a physics as opposed to engineering point of view) in which case the
    > power usage is proportional to the switching frequency, all other things
    > remaining equal. Assumimg also that modern CPUs are FET-like instead of
    > bipolar.

    CMOS, certainly. There are few "passive" devices (like bipolar or
    N/PFET). ...at least not on purpose. The problem is in the details.

    > What actually happens in the *real* world? Assuming voltage remains
    > constant, how non-linear (with respect to frequency) is a transistor in
    > the range that it's typically being pushed in a modern CPU? And what is
    > the main contributor to that non-lineararity?

    The "real world" five years ago could be modeled quite like you propose.
    The power more-or-less proportional to the *active* CMOS power
    equations, much like; P ~ kCFV**2. Forgetting the "static" (or leakage)
    power, was easy since it wasn't a big issue (perhaps 10%). The world
    changed at 130nm and is getting worse exponentially as the structures
    shrink. (If you don't believe me look at the ratio of standby/active
    power of a PII vs. PIV at the same voltage.)

    Speed is still proportional to the voltage, but the power is proportional
    to (at least) the square of the voltage. What's changed is that the static
    (leakage) power is now a very significant part of the power budget. Since
    leakage isn't a resistive effect (current goes up at a higher rate than
    voltage) the power dissipated is even a higher-order function. Leakage
    sux! ;-)

    There are two major contributors to this power, sub-threshold leakage
    (essentially current through the ever-shortening channel when the device
    is "off"), and gate tunneling (current tunneling across the
    few-atom thick gate oxide). Both of these currents are a huge function of
    voltage. Both can be mitigated by a smart choice of devices and operating
    condiditons.

    A processor designed for a server may use lower threshold
    devices (that leak like hell) and very thin gate oxide (likewise). ...and
    pay for it in power dissipation. A laptop may make the oppposite choice.
    Indeed within a single system one can control the voltage (the only
    independent variable) depending on the processing needs.

    suspending clocks doesn't change the power for the work done,
    since 'f' is a linear function WRT power/performance.

    My issue here is that voltage is *not* a constant. Even the Pentiums had
    different voltage ratings across the product line. THe PII made it a
    function of the processsor module (but was still static). TMTA (I
    believe) introduced the concept of varying the voltage dependent on the
    processing needs. This is now a requirement.

    A single graph that shows power vs. frequency for a processor
    family doesn't show anything close to the whole picture.

    --
    Keith
  19. Archived from groups: alt.comp.hardware.overclocking.amd,alt.comp.hardware.overclocking,comp.sys.ibm.pc.hardware.chips (More info?)

    In comp.sys.ibm.pc.hardware.chips keith <krw@att.bizzzz> wrote:

    > My issue here is that voltage is *not* a constant. Even the Pentiums had
    > different voltage ratings across the product line. THe PII made it a
    > function of the processsor module (but was still static). TMTA (I
    > believe) introduced the concept of varying the voltage dependent on the
    > processing needs. This is now a requirement.

    A few more things.

    IIRC Tom Burd's PhD thesis was on the dynamic voltage variance.
    (The ex-Berkeley CPU infopad maintainer)

    AMD/Intel had to be more conservative in doing dynamic voltage
    supply because of more extensive use of custom/dynamic logic.
    Some of the non standard/non static CMOS stuff doesn't like to have
    the supply voltage change on them very much, but the pressure
    to reduce power is leading everyone down similar paths.

    Foxton is advertised as the enabling technology for Montecito.
    (dynamic frequency/voltage adjustment for power-performance
    optimization @ 90nm node)

    Without Foxton, Montecito would have ended up having to eat
    3X of the power of Madison. (So sayth the "whitepaper")

    --
    davewang202(at)yahoo(dot)com
  20. Archived from groups: alt.comp.hardware.overclocking.amd,alt.comp.hardware.overclocking,comp.sys.ibm.pc.hardware.chips (More info?)

    "keith" <krw@att.bizzzz> wrote in message
    news:pan.2004.10.13.03.01.18.706428@att.bizzzz...
    > On Tue, 12 Oct 2004 21:34:06 +1300, Michael Brown wrote:

    > > What actually happens in the *real* world? Assuming voltage remains
    > > constant, how non-linear (with respect to frequency) is a transistor in
    > > the range that it's typically being pushed in a modern CPU? And what is
    > > the main contributor to that non-lineararity?
    >
    > The "real world" five years ago could be modeled quite like you propose.
    > The power more-or-less proportional to the *active* CMOS power
    > equations, much like; P ~ kCFV**2. Forgetting the "static" (or leakage)
    > power, was easy since it wasn't a big issue (perhaps 10%). The world
    > changed at 130nm and is getting worse exponentially as the structures
    > shrink. (If you don't believe me look at the ratio of standby/active
    > power of a PII vs. PIV at the same voltage.)
    >
    > Speed is still proportional to the voltage, but the power is proportional
    > to (at least) the square of the voltage. What's changed is that the static
    > (leakage) power is now a very significant part of the power budget. Since
    > leakage isn't a resistive effect (current goes up at a higher rate than
    > voltage) the power dissipated is even a higher-order function. Leakage
    > sux! ;-)
    >
    > There are two major contributors to this power, sub-threshold leakage
    > (essentially current through the ever-shortening channel when the device
    > is "off"), and gate tunneling (current tunneling across the
    > few-atom thick gate oxide). Both of these currents are a huge function of
    > voltage. Both can be mitigated by a smart choice of devices and operating
    > condiditons.
    >
    > A processor designed for a server may use lower threshold
    > devices (that leak like hell) and very thin gate oxide (likewise). ...and
    > pay for it in power dissipation. A laptop may make the oppposite choice.
    > Indeed within a single system one can control the voltage (the only
    > independent variable) depending on the processing needs.
    >
    > suspending clocks doesn't change the power for the work done,
    > since 'f' is a linear function WRT power/performance.
    >
    > My issue here is that voltage is *not* a constant. Even the Pentiums had
    > different voltage ratings across the product line. THe PII made it a
    > function of the processsor module (but was still static). TMTA (I
    > believe) introduced the concept of varying the voltage dependent on the
    > processing needs. This is now a requirement.
    >
    > A single graph that shows power vs. frequency for a processor
    > family doesn't show anything close to the whole picture.
    >
    > --
    > Keith

    You are confused with a bunch of different concepts.

    Your first confusions is about "voltage" and "product line".
    Voltage is something engineers are using at will, to make
    the product work for it's targeted frequency but staying
    within reasonable reliability of devices and total power
    envelope. The voltage is a variable that you can control
    during your experiments with processor clocking and plotting
    charts of processor power versus core clock. If you
    want to compare two processors, one at 130nm, and another
    at 90nm, to see how their power grows with frequency,
    you run them at their corresponding _constant_ voltages
    (and temperatures), and you get the picture I charted before.
    Even if you are correct that "Pentiums had different voltage ratings
    across the product line", you still can run each processor
    at the same voltage while lowering core frequency down to
    get data points. Or increasing frequency, as all overclockers do,
    and they do change voltage at will.

    If you are trying to compare same (similar? if can find one!)
    processors on 0.35um, 0.25um, 0.18um, etc. process along the
    frequency axis, then this is a different story, the story called
    "CMOS scalability". Then yes, the classic CMOS scalability
    is severely broken starting from 0.25um, so the voltages
    between process generations are not going _down_ as they are
    expected from proportional geometry shrinks (because you can't
    shrink transistors proportionally any more because of various
    atomic-level limitations). I guess one can call it "non-linear"
    shrinks :-(

    The original question was, as I read it, "what is non-linear"
    with "transistors" as designs are pushed to higher frequencies
    (as the original chart clearly implies). The correct answer is that
    there is nothing really "non-linear" with CMOS transistor _GATES_.
    The whole known methodology of designing processors is still
    based on "flip-stay-flop" concept, therefore even today's
    processors still follow the basic power formula. A quick
    summary of CMOS power consumption basics can be found, e.g. here:

    http://www.cse.psu.edu/~vijay/iscatutorial/tutorial-sources.pdf

    Some (not very nice) discussion about common misconceptions
    about leakage, dynamic power, and heat sinks can be found at RWT:

    http://www.realworldtech.com/forums/index.cfm?action=detail&PostNum=1224&Thr
    ead=1&entryID=14502&roomID=11

    You can find there an example of how 0.13um Pentium-4 power scales
    with frequency, all based on published specification data for Icc.
    From these documents it is clear that I am the last person
    who should be accused of "forgetting leakage".

    What happens in "real world"? In high-performance processor world,
    very simple - you push your design to the limits dictated by
    throat-cutting competition, by tweaking geometry, process
    corners, voltage, leakage, making thermal slabs and heat-pipe
    based heat sinks, all for one reason - to maintain a foothold
    in market share. When you hit a wall, everything is very
    strongly non-linear - a brick wall :-)

    - aap
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