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On Thu, 02 Dec 2004 14:49:55 +0000, Mark Hahn wrote:
>> As for whether it's a replacement for the Intel/AMD chips, that's a
>> definite negatory. The CPU market is one thing, but the x86 CPU market
>> of which Intel and AMD are the two biggest members are quite another
>> market. No matter how much performance a competing architecture brings
>> to bear, it's still never good enough to be considered a replacement
>> for x86. The only thing that's good enough to replace an x86 is
>> another x86.
>
> that's a bit of an overstatement - transmeta has found a corner of
> the x86 market where a non-x86 can do some damage. sure, they haven't
> taken over the world, but they're certainly viable.
I think this is over-stated. First, Transmetta *is* x86. They haven't
released their internal ISA, so it's x86 on the outside. Second, I don't
think Transmetta is viable. I don't see it lasting long without a major
float. Indeed, I'm surprised it even got past the first announcement
hype. The fact that it still exists is nothing but amazing.
>
>> Just look at the relative success of Opteron vs. Itanium.
>
> it's very intresting to compare. for instance, the it2 has been pushed
> very hard ahead of demand, and hasn't exactly shone. but the opteron has
> been anti-marketed by AMD (ie, yes, it does run windows, but most
> windows-on-opteron is in brain-damaged Intel-compatible mode).
Anti-marked by AMD? DO you think AMD owns M$?
> so the
> Opteron has a big bump to performance just waiting for someone in
> Redmond to take advantage of it. the it2 desperately needs a perf bump,
> since at least one large company has staked its enterprise line on it.
Don't believe this hype either.
> and the it2 perf bump doesn't seem forthcoming.
Agreed. Itanic lost its 15 minutes. Could-shoulda-woulda.
> look at the routes these chips took. opteron tweaked the existing,
> fairly boring athlon core, put a nicer cache on it, great memory
> interface, and elegant system infrastructure.
"Tweaked", "fairly boring Athlon"? We live in alternat universes,
obviously (mine has capital letters, BTW, ;-). The Atlon core was
anything but boring. It was a rather agressive super-scalar OoO
architecture, one that set Intel's P3 on its butt. I hardly consider the
K8 a "tweaked" K7. Sure, there are elements of the K7, but hell there are
elements of the Eniac in it too.
> considering how little
> AMD has improved their core over the years, their success is amazing.
You're on drugs! I suppose you don't think IBM's Z series is more than a
"little" improved over the 360 that came our 40 years ago. Sheesh! The
parallels are there for the blind to see.
> quite a contrast to the it2, whose raison-d'etre was to do a new core
> ISA from scratch. Intel/HP have always claimed that EPIC's design was
> motivated by wanting to scale performance into the stratosphere. alas,
> for current it2's at least, where performance is good happens to be
> places where the entire application+dataset fit into cache. would
> it2-9m be faster than an opteron with 9M cache? I doubt it. what does
> that say about Intel/HP's innovation-in-ISA?
Again, you miss the forrest for the trees. The real question is "what
does that say for evolution over revolution?". Opteron evolved, the
Itanic sunk.
>
> and multicore is not going to save it2. it'll give a nice tweak to
> performance under some loads, no doubt. but since it2's competitors
> will probably go multicore before it,
Umm, PowerPC has been multicore for several years. There is nothing
new here. Pay attention!
> Intel gets no relative advantage.
> and after all, it2-multicore is essentially just making up for the fact
> that the it2 ISA designers are so hostile to out-of-order. one of those
> mysteries - if OOO is such a bad thing, why have other chip design teams
> been able to push it so far? no doubt the OOO designs have been harder
> because of the OOO, but has the it2 taken advantage of this to push
> other aspects of performance, or to have a shorter time-to-market?
> unless you count obscene onchip caches as an ISA innovation, I just
> don't see where the it2 is winning.
Are we rambling here? ...or is there a point?
>
> here's a match I'd love to see: AMD buys Transmeta.
Gack!
> why? mainly
> because Transmeta has higher-order, firmware-based insight into
> performance.
....and it's given them exactly what? What gain would that knowledge
give AMD? Please, Transmetta is all about profiling, albeit on the fly.
> for instance, Transmeta can implement using a hard+soft
> combination, more intelligence in predicting branches, or in predicting
> computed ld/st addresses, or even in predicting values.
Sounds great. Tastes not so.
> suppose you can
> accurately predict when a store writes to an address which won't be used
> any time soon.
If you can *really* predict this well, why bother doing the instruction in
the interim? This is *exactly* the falacy of Itanic. The reson we
execute instructions is because we *don't* know what the result is going
to be ahead of time.
> why not write it through to dram? no sense in wasting a
> cacheline on that.
Good plan. All we need is the famous IEHGOD supervisor and we can have
IBM;s OS/VU (Virtual Universe), since we can now see into the future!
> predicting loads, of course, is even better, since
> they tend to stall, but stores can be posted. but can you afford to
> treat every load the same way you do branches (with a multi-state FSM to
> predict the outcome)? perhaps not in hardware, but maybe in firmware
> (maybe even encoded in your internal instruction stream, since AMD
> already does cache partially decoded instructions, though doesnt' go as
> far as Intel's trace cache...)
Hell, if we know the answer, don't even turn the damned machine on!
Let me guess, you've never worked in processor or OS development.
--
Keith