Archived from groups: comp.sys.ibm.pc.hardware.chips,comp.sys.intel (More info?
On 16 Jun 2005 06:37:17 -0700, "YKhan" <email@example.com> wrote:
>Intel to add memory controllers to future Xeons, Itanics | The Register
Hmm, as speculated here: firstname.lastname@example.org last
December. The really interesting part of this is what they use for a
CPU/system interconnect... IOW the equivalent of Hypertransport.
Rgds, George Macdonald