Archived from groups: alt.comp.periphs.mainboard.asus (
More info?)
In article <gRDac.6639$yN6.5635@newsread2.news.atl.earthlink.net>, spets
<nospam@nospam.com> wrote:
> Paul wrote:
> > In article <nXuac.5546$NL4.283@newsread3.news.atl.earthlink.net>, spets
> > <nospam@nospam.com> wrote:
> >
> >
> >>I have a friend who just upgraded her computer with
> >>an Asus A7v8X-X motherboard and a fresh install of
> >>Win 98SE. Now she can't get DOS sound out of her
> >>SBLive sound card. She's got all the DOS drivers
> >>installed from the SBLive CD. But I've read the
> >>SBLive's emulation won't work with motherboards
> >>that don't support NMI (non-maskable interrupts).
> >>
> >>Does anyone happen to know if the Asus A7v8X-X
> >>supports NMI? There's a product page for it here
> >>http://www.asus.com/products/mb/socketa/a7v8x-x/overview.htm
> >>but I don't see any mention of NMI or non-maskable interrupts.
> >>
> >>One of her favorite old DOS games is Realms of the Haunting,
> >>but it won't work with the DOSBox emulator. So she's been
> >>spending a lot of time trying to get her DOS sound working.
> >>I'm wondering if it's a hopeless cause.
> >
> >
> > Looking in Google, there are a lot of references to NMI,
> > as mentioned on the Creative site, but as a hardware guy, I
> > don't understand how this would work with a PCI card. There
> > is no NMI on there. (But in the PCI standard, I did notice a
> > reference to SERR# system error signal on a PCI card, needing
> > to be routed to NMI to raise a system error if something
> > serious is detected on the PCI card. It is the only place
> > in the standard where the word "NMI" appears.)
> >
> >
http://www.mameworld.net/emuadvice/sound.html
> >
> > This post basically identifies that SERR# has to be wired
> > to the chain of logic leading to NMI.
> >
> >
http://groups.google.com/groups?hl=en&lr=&ie=UTF-8&selm=36c5aefa.0%40news1.mweb.co.za
> >
> > I had a look at a reference schematic for an Intel chipset,
> > and SERR is wired to a pin on the Southbridge. The Southbridge
> > has register control over what the SERR is connected to. For
> > example, SERR can be logically connected to the NMI pin that
> > goes from the Southbridge to the processor. Perhaps this is the
> > kind of BIOS support that is mentioned - maybe the BIOS needs
> > to set up the response from SERR to NMI.
> >
> > As a result of this quick check, I have to think that from a
> > hardware perspective, this is a "follow the dots" kind of
> > problem - as long as the HW designer hooks up the pin, the
> > rest of the solution is in the hands of BIOS writers and
> > driver writers.
> >
> > Since no docs are available on Via chipsets, that is as much
> > analogizing as I can do.
> >
> > Paul
>
> Thank you for finding all this out for me. I'll show
> my friend the links and see what she thinks. She's
> been asking me to explain why the card needs NMI
> and the google link you found does just that.
Looking in Google, I also find SERR# mentioned in a control file
for WPCREDIT. Maybe SERR# gets coupled into interrupt logic with
that setting, which you could at least query to see whether it is
enabled or not. It could be that the SERR# logic is unreliable
and that is why it isn't enabled by Asus.
http://groups.google.com/groups?hl=en&lr=&ie=UTF-8&selm=9u3k2o%248uf%2402%241%40news.t-online.com&rnum=12
Happy exploring,
Paul