Archived from groups: alt.comp.periphs.mainboard.asus (More info?)
I finally managed to run an experiment on the Nforce2,
to find out what happens when the amount of RAM on
the two channels isn't matched.
There are a couple of ways you can populate RAM.
You can balance the channels, by having 2 x 256MB
in slot 1 and slot 2 (total 512MB on that channel)
and 1 x 512MB in slot 3 (total 512MB on that channel),
for a total of 1GB. Since the two channels have the
same amount of memory, the Northbridge can alternate
between channels, all the way from 0, to the 1GB mark.
That is true dual channel.
If you place 2 x 512MB in slot 1 and slot 2, and
1 x 512MB in slot 3, the channels are unbalanced.
The BIOS shows "Dual Channel" when you run this
configuration, but I referred to this in a previous
post as "composite" mode, because once you get
past the point where there is memory available on
both channels, the memory controller has no choice
but to revert to single channel operation for that
memory region. In the example configuration above,
my theory was, it would be dual channel from 0 to
1GB, and single channel from 1GB to 1.5GB.
I've wasted a significant amount of time, trying to
find a decent development environment, to carry out
the experiment. What I discovered is, I would need to
know more about segments and paging then I care to know,
and it would take many experiments, involving the
rebooting of the computer for each one.
I did remember the memtest86 program, has a memory
bandwidth readout printed on the screen. I downloaded
the source from memtest.org, but a cursory examination
led me to believe adding code to that program would be
tough. After failing to make any progress by starting
from scratch, I returned today to that source, and found
it is dead easy to modify.
I downloaded the source to version 1.27, and opened the
init.c module. Before "Print out L1 cache info", I put:
for (i=1; i<12; i++) {
speed=memspeed((ulong)mapping(i*128*0x100), 16*1024*1024, 20);
hprint(i+11, 1, (ulong)mapping(i*128*0x100));
dprint(i+11,20, speed, 8, 0);
}
After saving the changes, typing "make", insert a blank
floppy, type "make install", I had a test floppy for
booting into memtest.
What this does, is chop my 1536MB of memory into 12 zones,
and test 11 of them. I didn't bother testing the first zone,
to make sure the output didn't scroll off the screen. (Note
that I used hard coded values, suitable for my memory
configuration, so if you try this code, modify the address
stride and test size in the memspeed routine to fit your
machine.)
The memspeed routine takes an address, size, and iteration
count as arguments. The 0x100 is hex and the units are 4KB
pages of memory. Thus, 128 times that number, is 128MB, so
the first call starts at base address 128MB, the second at
256MB and so on. The test length was 16MB, and the choice of
20 iterations is arbitrary. Test time per block is about
1 second or so.
The HPRINT prints a hex number, in this case the address.
The DPRINT prints a decimal number, which is megabytes/sec.
When I ran the test, I got:
08000000 1435 ; (This is address 128MB)
10000000 1435
18000000 1435
20000000 1435
28000000 1435
30000000 1435
38000000 1435
40000000 916 ; (This is address 1GB)
48000000 916
50000000 916
58000000 916
In the normal place in the upper left of the screen, the
memory bandwidth measurement shows 1485MB/sec, for three
double sided sticks of DDR400 2-2-2-6 memory at stock
speed. The reason for the difference between 1485 and
1435, is the size of the memory block tested is different
between the display in the upper left of the screen, and
the size of 16MB I used for my test.
What this proves, is if you use three identical sticks,
the Nforce2 has no choice but to run part of the memory
space in single channel mode. Depending on which OS you
use, and which end of memory is used for most of your work,
you may feel a perceptable change when using the upper
part of the memory space.
Paul
I finally managed to run an experiment on the Nforce2,
to find out what happens when the amount of RAM on
the two channels isn't matched.
There are a couple of ways you can populate RAM.
You can balance the channels, by having 2 x 256MB
in slot 1 and slot 2 (total 512MB on that channel)
and 1 x 512MB in slot 3 (total 512MB on that channel),
for a total of 1GB. Since the two channels have the
same amount of memory, the Northbridge can alternate
between channels, all the way from 0, to the 1GB mark.
That is true dual channel.
If you place 2 x 512MB in slot 1 and slot 2, and
1 x 512MB in slot 3, the channels are unbalanced.
The BIOS shows "Dual Channel" when you run this
configuration, but I referred to this in a previous
post as "composite" mode, because once you get
past the point where there is memory available on
both channels, the memory controller has no choice
but to revert to single channel operation for that
memory region. In the example configuration above,
my theory was, it would be dual channel from 0 to
1GB, and single channel from 1GB to 1.5GB.
I've wasted a significant amount of time, trying to
find a decent development environment, to carry out
the experiment. What I discovered is, I would need to
know more about segments and paging then I care to know,
and it would take many experiments, involving the
rebooting of the computer for each one.
I did remember the memtest86 program, has a memory
bandwidth readout printed on the screen. I downloaded
the source from memtest.org, but a cursory examination
led me to believe adding code to that program would be
tough. After failing to make any progress by starting
from scratch, I returned today to that source, and found
it is dead easy to modify.
I downloaded the source to version 1.27, and opened the
init.c module. Before "Print out L1 cache info", I put:
for (i=1; i<12; i++) {
speed=memspeed((ulong)mapping(i*128*0x100), 16*1024*1024, 20);
hprint(i+11, 1, (ulong)mapping(i*128*0x100));
dprint(i+11,20, speed, 8, 0);
}
After saving the changes, typing "make", insert a blank
floppy, type "make install", I had a test floppy for
booting into memtest.
What this does, is chop my 1536MB of memory into 12 zones,
and test 11 of them. I didn't bother testing the first zone,
to make sure the output didn't scroll off the screen. (Note
that I used hard coded values, suitable for my memory
configuration, so if you try this code, modify the address
stride and test size in the memspeed routine to fit your
machine.)
The memspeed routine takes an address, size, and iteration
count as arguments. The 0x100 is hex and the units are 4KB
pages of memory. Thus, 128 times that number, is 128MB, so
the first call starts at base address 128MB, the second at
256MB and so on. The test length was 16MB, and the choice of
20 iterations is arbitrary. Test time per block is about
1 second or so.
The HPRINT prints a hex number, in this case the address.
The DPRINT prints a decimal number, which is megabytes/sec.
When I ran the test, I got:
08000000 1435 ; (This is address 128MB)
10000000 1435
18000000 1435
20000000 1435
28000000 1435
30000000 1435
38000000 1435
40000000 916 ; (This is address 1GB)
48000000 916
50000000 916
58000000 916
In the normal place in the upper left of the screen, the
memory bandwidth measurement shows 1485MB/sec, for three
double sided sticks of DDR400 2-2-2-6 memory at stock
speed. The reason for the difference between 1485 and
1435, is the size of the memory block tested is different
between the display in the upper left of the screen, and
the size of 16MB I used for my test.
What this proves, is if you use three identical sticks,
the Nforce2 has no choice but to run part of the memory
space in single channel mode. Depending on which OS you
use, and which end of memory is used for most of your work,
you may feel a perceptable change when using the upper
part of the memory space.
Paul
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