Archived from groups: alt.comp.hardware.overclocking.amd,alt.comp.hardware (
More info?)
On Tue, 14 Dec 2004 08:50:44 -0500, General Schvantzkoph wrote:
> On Tue, 14 Dec 2004 09:26:40 +0000, Wes Newell wrote:
>
>> On Mon, 13 Dec 2004 23:52:45 -0500, General Schvantzkoph wrote:
>>
>>> 64 bits refers to the address size not to data sizes,
>>
>> Now that's a new one and I thought I'd heard them all.
Actually, this
>> is incorrect too though. The A64 address bus is 40bits, 48 virtual.
>>
>>> a 32 bit CPU can address 4 billion bytes
>>
>> Tell me why my 32bit 68000 cpu can only address 16MB then (1 clue, it has
>> a 24bit address bus). I really haven't checked, but it's very possible to
>> have a 32bit cpu address more than 4GB. the amount of directly addressable
>> ram is controlled by the size of the address bus, and has nothing to do
>> with 32, 64, or 128 bit cpu's.
>
> The physical address space of a CPU is almost never identical to the
> virtual address. The virtual address space is what the programmer sees, so
> in a 32 bit architecture that's 4G and in 64 bit architecture it's
> 1.6*10^19. The physical address space is determined by the width of the
> Address Translation Unit RAM and the address pins on the CPU. The physical
> address space is a choice that the CPU designers make for each design.
> Pins and RAM cost money so you don't want to support a physical address
> space that's larger than the maximum amount of RAM that the particular CPU
> is ever likely to have. When the 68000 came out the biggest DRAM was 64K,
> the CPU designers would have figured that at the end of life of the chip
> the biggest DRAM would be the 1M DRAM so they picked 16M as the physical
> address space because it was confortably larger then any real memory
> system that it would ever have to support without being excessively
> expensive. When you get to the end of an architecture's life, as we are
> now with the 32 bit x86 architecture, it becomes possible to have more
> real memory then virtual memory. The way this is handled is that CPUs can
> support multiple virtual address spaces, each of which can have it's own
> DRAM space. So a Xeon might have 16 separate threads each of which can
> address 4G of RAM for a total of 64G of real memory. Each thread is still
> limited to 4G but you can have lots of them. There are also ways to give
> programmers access to more memory by using segmentation registers which
> allows the programmers to manage multiple virtual memory spaces within one
> process, that's what the 80286 did to extend the 16 bit address space of
> the 8086. Segmentation is a horrible way to handle memory, a larger linear
> address space is much easier for programmers to deal with. The AMD64
> architecture is now back to where we were in the 68K days. The virtual
> address space is so large that all the RAMs in the world couldn't fill it.
> The programmer sees the 64 bit space but the actual amount of physical RAM
> supported is much smaller, I'm not sure what the exact size is but I
> suspect it's around 40 bits (1 terabyte) which would be confortably larger
> than the amount of RAM that this generation of chips is likely to have to
> support (assuming 4G and maybe even 16G RAMs by the time the last current
> generation A64s are unplugged).
Aha, so now they consider the bitness of the cpu to be the maximum
possible address space within the architecture if you're sumize is
correct. I wonder who keeps changing the nomenclature. In the beginning it
was defined by the data bus size, then it changed to register size (I
think Intel was the first to do this, with the 8088). Motorola redefined
thier 16bit 68000 to calling it a 32bit later. And now we have a bitness
that virtually has nothing to do with anything speed wise, actual ram
address size or anything of any value. Next thing you know they'll be
adding up all the bus widths of the cpu and calling it an xxxx bit cpu.
Got to one up the competition.
--
Abit KT7-Raid (KT133) Tbred B core CPU @2400MHz (24x100FSB)
http://mysite.verizon.net/res0exft/cpu.htm