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WHY INTEL DOESN'T INCLUDE A MEMORY CONTROLLER IN IT'S CHIPS?




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 Thread : WHY INTEL DOESN'T INCLUDE A MEMORY CONTROLLER IN IT'S CHIPS?
 
Profile: old hand
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Memory controllers add space to the size of the chips. In turn, this cuts down the number you can make


Paul Otellini has to be a real dumb @ss to say something like that. AMD's memory controller only takes 5% of die space, while Intel's approach of larger caches takes 50% of the chip die area.

Once again, Intel's way to hide their flaw. :wink:

http://news.com.com/2061-10791_3-6047412.html?part=rss&tag=6047412&subj=news

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Profile: Eternal Poster
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WHY DOES EVERYONE HAS TO TYPE IN CAPS FOR!!!!!????1111

Intel is working on it, moron. Also AMD's caches take up alot of real estate too, moron.

Profile: Honorary Poster
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WHY DOES EVERYONE HAS TO TYPE IN CAPS FOR!!!!!????1111

Intel is working on it, moron. Also AMD's caches take up alot of real estate too, moron.



Shut up fanboy, here's your rigged conroe: http://voodoopc.blogspot.com/2006/ [...] chine.html

~~Mad Mod Mike, pimpin' the world 1 rig at a time

Profile: nimble knuckle
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Yep, so true. I'm not gonna disagree with you on that. There is simply no better design than AMDs.

The drawback with this is, it doesn't leave much room for AMD to improve their current design much though.

Profile: Honorary Poster
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Yep, so true. I'm not gonna disagree with you on that. There is simply no better design than AMDs.

The drawback with this is, it doesn't leave much room for AMD to improve their current design much though.



http://voodoopc.blogspot.com/2006/ [...] chine.html

~~Mad Mod Mike, pimpin' the world 1 rig at a time

Profile: old hand
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You're right, chip die area isn't a very good reason. However, it is important to look at the whole concept of what he is saying which is included in the lines that followed which you didn't include.

Quote :

Instead, Intel makes its memory controllers on the next-to-best technology generation, where silicon real estate goes for less of a premium.


The current northbridges are made on the 130nm process which hasn't been used in processors since Banias. By using a older process, Intel maximizes it's production facilities while keeping costs at a minimum. I'm probably being repetitive, but Intel's next step is to double transition from 130nm to 90nm and 200mm wafers to 300mm wafers which should easily cut their production costs by more than half while reducing power consumption and giving them more space for additional features.

A lot of it is probably superstition. Intel tried it with Timna and it screwed up royally. Now AMD is constantly flaunting their OMC. The OMC just seems like bad luck for Intel.

Profile: enthusiast
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Mad Mode! How was the aformentioned post fanboy? And secondly, do you think you sound smart?

Profile: Honorary Poster
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Mad Mode! How was the aformentioned post fanboy? And secondly, do you think you sound smart?



http://voodoopc.blogspot.com/2006/ [...] chine.html - That proves Intel was lying, sorry Fanboys.

~~Mad Mod Mike, pimpin' the world 1 rig at a time

Profile: Honorary Poster
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You're right, chip die area isn't a very good reason. However, it is important to look at the whole concept of what he is saying which is included in the lines that followed which you didn't include.

Instead, Intel makes its memory controllers on the next-to-best technology generation, where silicon real estate goes for less of a premium.


The current northbridges are made on the 130nm process which hasn't been used in processors since Banias. By using a older process, Intel maximizes it's production facilities while keeping costs at a minimum. I'm probably being repetitive, but Intel's next step is to double transition from 130nm to 90nm and 200mm wafers to 300mm wafers which should easily cut their production costs by more than half while reducing power consumption and giving them more space for additional features.

A lot of it is probably superstition. Intel tried it with Timna and it screwed up royally. Now AMD is constantly flaunting their OMC. The OMC just seems like bad luck for Intel.

Oh shut up and look at this fanboy: http://voodoopc.blogspot.com/2006/ [...] chine.html

~~Mad Mod Mike, pimpin' the world 1 rig at a time

Profile: enthusiast
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SSA BMUD LETNI NICKUF A TSUJ ER'UOY. MUROF SITH NI UOY NAHT ELPOEP RETRAMS ERA EREHT
STCAF EHT EES OT STNAW T'NSEOD TAHT

Profile: enthusiast
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Where is the fanboy post mad mod? And do you think you sound smart?

Profile: Eternal Poster
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I read it dipsh!t, its weak at best.

Profile: Eternal Poster
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Great post, p!ss off fanboy.

Profile: Honorary Poster
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Great post, p!ss off fanboy.



LOL YOU FANBOYS ARE ALL CRYING NOW THAT YOUR CONROE WAS EXPOSED AND I WAS RIGHT!! AHAHAHAHAHAHAHAHAHAH

http://voodoopc.blogspot.com/2006/ [...] chine.html

~~Mad Mod Mike, pimpin' the world 1 rig at a time

Profile: Eternal Poster
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I'll have a T for troll and a W for wrong.

5 steps of grief:

1. shock
2. denial <-- you are here
3. depression
4. anger
5. acceptance

Profile: Honorary Poster
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Quote :

I'll have a T for troll and a W for wrong.

5 steps of grief:

1. shock
2. denial <-- you are here
3. depression
4. anger
5. acceptance



1. FANBOY WHO WAS PROVED WRONG <== YOU'RE THERE!

http://voodoopc.blogspot.com/2006/ [...] chine.html

~~Mad Mod Mike, pimpin' the world 1 rig at a time

Profile: Eternal Poster
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