Direct Connect Architecture 2.0

[MadModMike]

It appears AMD is going to update it's Direct Connect architecture in 2008, I can't find any specifics on it but I'm sure it will be used for their Greater Than 8-Way Server designs.

~~Mad Mod Mike, pimpin' the world 1 rig at a time

 

[ltcommander_data]

So will the 32-way setups that AMD is talking about now not be available until then?

Direct Connect 2.0 will probably be AMD's response to CSI or whatever Intel's using to compete with the OMC and Hypertransport which should also be out in 2008.

 

[MadModMike]

So will the 32-way setups that AMD is talking about now not be available until then?

Direct Connect 2.0 will probably be AMD's response to CSI or whatever Intel's using to compete with the OMC and Hypertransport which should also be out in 2008.

AMD does have their "Greater Than 8-Way Servers" roadmapped to 2008, but their are several implements prior to that, such as:

1) Advanced Power & Thermal Management
2) Shared L3 Cache
3) More Than 2-Cores
4) RAS
5) FB-DIMM
6) DDR2/DDR3/DDR4
7) HyperTransport 3.0 (Coming 2007)
8 ) HyperTransport 4.0 (Coming 2008)
9) 65nm (Coming 2006)
10) 45nm (Coming 2008)
11) SGOI

~~Mad Mod Mike, pimpin' the world 1 rig at a time

 

[dvdpiddy]

yay go amd go!

 

[BaronMatrix]

So will the 32-way setups that AMD is talking about now not be available until then?

Direct Connect 2.0 will probably be AMD's response to CSI or whatever Intel's using to compete with the OMC and Hypertransport which should also be out in 2008.

8+ way will happen when L3 happens. It is not a factor of Direct Connect or HTT, it is a factor of increased cache coherency. If you notice, Intel only gets above 8way with L3-enabled Xeons. The Horus setup uses a chipset to handle coherency but that is a stopgap until L3.

 

[MadModMike]

So will the 32-way setups that AMD is talking about now not be available until then?

Direct Connect 2.0 will probably be AMD's response to CSI or whatever Intel's using to compete with the OMC and Hypertransport which should also be out in 2008.

8+ way will happen when L3 happens. It is not a factor of Direct Connect or HTT, it is a factor of increased cache coherency. If you notice, Intel only gets above 8way with L3-enabled Xeons. The Horus setup uses a chipset to handle coherency but that is a stopgap until L3.

The big thing in 8-Way Opteron 64's is latency, which is where the L3 Cache and DC2.0/HTT 2.0/3.0 come into play, the best bet is to utilize smaller bus's (8-bit has lower latency but provides less bandwidth) in conjunction w/ improved I/O to maximize performance. It will be interesting to see the future of the Opteron 64, as I said in another thread, Socket F is by far the most scalable and customizable platform to date, IMHO.

~~Mad Mod Mike, pimpin' the world 1 rig at a time