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INTEL ITANIUM CHIEFTAIN DEFECTS TO AMD

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March 28, 2006 3:41:54 PM

Looks like Itanic is doomed more than ever since one of its main designers went to the AMD bandwagon. 8)
http://www.theinquirer.net/?article=30591
March 28, 2006 3:48:54 PM

I was going to post that. :evil: 
March 28, 2006 3:51:51 PM

So that means AMD is doomed since Itanium pretty much sucks and that guy will apply his Itanium skills in designing AMD chips.


hhhhmmmm Groovy
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March 28, 2006 3:57:18 PM

*sniff* Whats that smell?.....

*sniff sniff* Oh yeah, its a no competition clause lawsuit.

I doubt Intel is going to sit idly by and let a main processor designer leave and go to the competition to do the same thing. Same as the MS Exec that went to Google.
March 28, 2006 3:57:33 PM

Quote:
I was going to post that. :evil: 


Your... FIRED.

No new keyboard for U!! :lol: 
March 28, 2006 3:59:23 PM

Quote:
So that means AMD is doomed since Itanium pretty much sucks and that guy will apply his Itanium skills in designing AMD chips.


hhhhmmmm Groovy


:lol:  :lol: 

Not really. The thing about these guys is that they're forced by Intel to design something that they usually don't like. That's a big difference between AMD and Intel engineers since AMD's staff works in a more cooperative environment.
March 28, 2006 4:04:15 PM

Yeah I know and agree for the most part. I was just poking fun
March 28, 2006 4:09:56 PM

Quote:
doubt Intel is going to sit idly by and let a main processor designer leave and go to the competition to do the same thing. Same as the MS Exec that went to Google.


This will be the second Intel engineer that's joining the "green arrow" team.
I don't know if there've being more that flew away from Intel (correct me if I'm wrong).

Quote:
9-Inch: I was going to post that. :evil: 

Sorry to hurt your feelings. 8)
March 28, 2006 5:36:18 PM

That guy must be dumb at least his dumbness perfectly fits to AMD *lolz*
March 28, 2006 5:56:04 PM

Quote:
So that means AMD is doomed since Itanium pretty much sucks and that guy will apply his Itanium skills in designing AMD chips.


hhhhmmmm Groovy


Haha, very funny. It would be like Dupont hiring the guy who invented lead-based paint!
March 28, 2006 5:58:29 PM

Quote:
That guy must be dumb at least his dumbness perfectly fits to AMD *lolz*


^^ This is the kind of pointless immature fanboy junk I hate. It's one thing to make a constructive comment based on fact and it's another to take the time to type something pointless such as, "yUR mOM, LOLERCOASTERXOR!!"
March 28, 2006 6:28:20 PM

Quote:
Quote:
9-Inch: I was going to post that.

Sorry to hurt your feelings


Maybe you were the first one posting that, but I found this info which says it all. :lol: 

http://www.realworldtech.com/page.cfm?NewsID=359&date=03-28-2006#359
Quote:
AMD executives recently disclosed that they were working on two brand new MPU designs, in addition to everything already in their pipeline. One design is targeted for mobile products, the other for servers. One of the two will also be modified for use in desktop systems. Given that AMD is also working on the K8L, which is slated for release in 2007, we were curious where they had managed to find the design resources for these projects. The answer lies in Fort Collins, the epicenter of Intel’s Itanium design efforts.

We recently learned that Sam Naffziger, formerly an Intel Fellow and Director of Itanium Circuits and Technology, has departed from Intel. Before leaving, he was responsible for the design of Montecito (a dual core, dual threaded Itanium processor), which has been delayed by nearly a year due to problems with an extremely interesting and aggressive dynamic feedback mechanism, codenamed Foxton. Foxton integrated an on-die ammeter that measures current, and a microcontroller that can dynamically adjust voltage and frequency based on measured results. Naffziger joined AMD in late February or early March, and will help start a Fort Collins design center.

AMD initially aims to hire 30 designers in Fort Collins, but will increase the head count to 200 if there are enough interested engineers. Managers from AMD moved to the area in early January to set up an office; they have posted ads in the local paper also held a job fair.

The real question is what the team at AMD’s Fort Collins design center focus on. Considering that most of the engineers in the area have worked on PA-RISC or Itanium, it seems reasonable to expect that they will concentrate on the server side, rather than on desktop or mobile MPUs. Either way, this should open up some interesting possibilities for AMD, and some new opportunities for Colorado residents.
March 28, 2006 6:38:23 PM

Quote:
That guy must be dumb at least his dumbness perfectly fits to AMD *lolz*
WTF was that? Even YOU Ycon must admit that Intel didn't do as good AMD these last few years. If you can't, you are sadly mistaken. I forgot, fanboys don't listen to facts, they eat up what ever crap their favorite company feeds them.
March 28, 2006 7:07:39 PM

Come on wil ya, gotta admit there is more prestige with working with the biggest chipmaker, and unless your moving to a smaller company as CEO or something much higher in rank, the move would not be a boost to the ego...
March 28, 2006 11:34:22 PM

Quote:
That guy must be dumb at least his dumbness perfectly fits to AMD *lolz*

"dumbness" is a word?
ahhh gotta love the irony 8)
March 28, 2006 11:39:09 PM

Quote:
LOLERCOASTERXOR!!
:lol: 

Quote:
the move would not be a boost to the ego...


maybe he didn't like the curtains in his office? or more likely, he was getting crap from someone from up on high and decided to just leave...i would
March 29, 2006 4:38:52 AM

Quote:
So that means AMD is doomed since Itanium pretty much sucks and that guy will apply his Itanium skills in designing AMD chips.


hhhhmmmm Groovy


The Itanium sucks for 2 reasons:

1) Emulation of x86 Instructions (Windows XP 64-bit is the huge reason for this emulation sucking)

2) 128-bit Front Side Bus (as we know, wider the bus = higher latency)

Other than that, the Itanium is a great CPU, the L3 Cache needs to be optimized and reduced to a reasonable level, after that, the CPU should be pretty damn good.

~~Mad Mod Mike, pimpin' the world 1 rig at a time
March 29, 2006 6:55:07 AM

You also gotta love that Itanic incorporated an FPU in the cache. Nice trick.
I mean the capabilities of montecito are insane. It just doesn't fit in with the rest of the world.
a b à CPUs
March 29, 2006 7:38:13 AM

who cares bout the itanium team the israle (conroe/merom/woodcrest) team is the one to watch, now if AMD got that team Intel would be hurt.
March 29, 2006 7:56:16 AM

As much as I dislike Itanium, because of its weaknesses it's strengths are nothing to be sneered at.
Clock for clock it is considerably faster than anything else out there.
We all know that it's Floating point capabilies are fantanstic, but even at an integer level it is still faster clock for clock than Opteron or power5 for that matter. They just can't get the clock speed out of it
If you look at any decent server benchmarks (see http://www50.sap.com/benchmarkdata/sd2tier.asp) for some ERP database comparison with all other popular architectures
you'll see that in low CPU count configurations a 1.6GHz with 9mb Itanium is faster than a 2.2GHz opteron. However as the number of CPUs goes up its lead goes down considerably. It does however scale to vastly more CPUs than Opteron does at the moment (64way).
Now comine its strengths with AMDs strengths (OMC/Hypertransport) and you will have an absolute killer.
If intel introduced a point to point connection with a built OMC, they could get rid of the 9mb of cache, or even better why not subsitute it with Z-RAM for cache with the onboard controller.
I wonder if AMDs strategy is to concentrate on the server space, move out of the high end desktop space, but use the desktop space for proving single threaded performance in the mid range.
Once the desktop CPU space has moved towards a multithreaded model, AMD will be able to pounce again with the experience gained in the server space.
March 30, 2006 12:54:32 AM

Itanium's main weakness was never its [different] 64-bit implementation, its cache size, nor its [wide] bus interface: EPIC (aka IA-64) is a technological feat, a landmark of creativity in the computing landscape. Its main weakness is the x86 ISA. And, it's within this x86 field both AMD & Intel will be showing off their brand new weapons.

IBM will, probably, spread Cell into the consumer [PC] space... and I'm sure they're well aware of both IA-64 & x86...


Cheers!
March 30, 2006 12:57:34 AM

Quote:
IBM will, probably, spread Cell into the consumer [PC] space...


Won't happen.
March 30, 2006 1:10:57 AM

Quote:
Itanium's main weakness was never its [different] 64-bit implementation, its cache size, nor its [wide] bus interface: EPIC (aka IA-64) is a technological feat, a landmark of creativity in the computing landscape. Its main weakness is the x86 ISA. And, it's within this x86 field both AMD & Intel will be showing off their brand new weapons.

IBM will, probably, spread Cell into the consumer [PC] space... and I'm sure they're well aware of both IA-64 & x86...


Cheers!


It's 128-bit Front Side Bus is bad for Coherency (or does that concept allude you??), hence why using an 8-bit HyperTransport is better for coherency than a 16-bit or 32-bit. o.O

I also 2nd the Cell crap, no way can that ever be in mainstream desktop, that was stupid to say...

~~Mad Mod Mike, pimpin' the world 1 rig at a time
March 30, 2006 5:30:08 AM

Maybe Intel Fired him!
March 30, 2006 6:39:59 AM

And maybe he just wanted to go to a company that made him feel at home. He probably got tired of hearing all the conroe bs.
As an Itanic circuit designer, I'd bet that he could draw out a better performer than conroe, during afternoon tea.
March 30, 2006 7:49:38 AM

Quote:
Itanium's main weakness was never its [different] 64-bit implementation, its cache size, nor its [wide] bus interface: EPIC (aka IA-64) is a technological feat, a landmark of creativity in the computing landscape. Its main weakness is the x86 ISA. And, it's within this x86 field both AMD & Intel will be showing off their brand new weapons.

IBM will, probably, spread Cell into the consumer [PC] space... and I'm sure they're well aware of both IA-64 & x86...


Cheers!


It's 128-bit Front Side Bus is bad for Coherency (or does that concept allude you??), hence why using an 8-bit HyperTransport is better for coherency than a 16-bit or 32-bit. o.O

I also 2nd the Cell crap, no way can that ever be in mainstream desktop, that was stupid to say...

~~Mad Mod Mike, pimpin' the world 1 rig at a time



mad mod mike im starting to like what your posting, Itanium's concept was a great one. I would put it in the same class as the original G4 CPU that motorolla put out in late 99. That CPU was matched with a 2MB of L3 Cache that during its time destroyed any offerings from INTEL, AMD and even IBM. Keep in mind it was running at 450 mhz and intel had the P3 running around 550-600 mhz. doesnt sound like much but back then it was.

Intel had a possible killer CPU for non mainstream consumers, but there downfall was like MMM said was the higher latency due to the 128 bit FSB.

dont quote me cause i have had a few and its late.
March 30, 2006 11:21:11 AM

Quote:
It's 128-bit Front Side Bus is bad for Coherency (or does that concept allude you??), hence why using an 8-bit HyperTransport is better for coherency than a 16-bit or 32-bit. o.O


Intel doen't use HyperTransport (I'm sure that doesn't elude you); and, according to your line of thought, 1-bit would be better still, instead of 8, right? Obviously, Intel uses a different approach, on what concerns the Bus issue.
All this, however, is beside my point.

Quote:
I also 2nd the Cell crap, no way can that ever be in mainstream desktop, that was stupid to say...


If you care to dig enough (though I doubt it), you'll certainly find that the STI Consortium did not engage into such an innovative (to say the least!) computing approach, in order to pull up the "ultimate gaming console"; it's in their intentions to start pushing the CBE into more discrete niches, like the multi-media (...), at first...

Whatever...


Cheers!
March 30, 2006 1:50:21 PM

First off, the words "Allude" and "Elude" can refer to the same thing...so much for thinking you're better than me "joset"... :roll:

Do you know what the word Coherency means? Coherency isn't strictly stuck to HyperTransport, it can be any 2 devices (or more) communicating to each other.

I said 8-bit is better for coherency because when you start getting into 8-Way Opteron 64 systems, coherency becomes a huge issue, and that's why rumors were spreading about possibly adding a 4th HT Link @ 8-bit or something of the like to add extra coherency, but obviously that's being offset with L3 Cache.

I stick to the fact that Cell is crap, and they are trying to push Cell into TV's, and I find funny that anybody refers to Toshiba, Sony, and IBM as "STI Consortium", lol, and I can careless if that's their "official" name, that's just hillarious spit.

And in case you haven't read the memo (more like billboard), the Cell "CPU" is as good as a tawdry maid on speed (you probably have to look up the word Tawdry, it might be too big for you :( ).

What else you got joset? Gonna go memorize more stuff like everybody else here? I have nothing against you, but you need to LEARN more about coherency (not just HT references) and stop memorizing White Papers like everybody else does.

~~Mad Mod Mike, pimpin' the world 1 rig at a time
March 30, 2006 3:00:16 PM

Quote:
First off, the words "Allude" and "Elude" can refer to the same thing...so much for thinking you're better than me "joset"... :roll:

Do you know what the word Coherency means? Coherency isn't strictly stuck to HyperTransport, it can be any 2 devices (or more) communicating to each other.


As for coherency:

http://www.thefreedictionary.com/allude;

http://www.thefreedictionary.com/elude.

It's a reasonable dictionary.

As for context: yes, they "can refer to the same thing", given the right context.

I wont comment both your 1st paragraph's last sentence and... pretense irony.

Quote:
I stick to the fact that Cell is crap, and they are trying to push Cell into TV's, and I find funny that anybody refers to Toshiba, Sony, and IBM as "STI Consortium", lol, and I can careless if that's their "official" name, that's just hillarious spit.

And in case you haven't read the memo (more like billboard), the Cell "CPU" is as good as a tawdry maid on speed (you probably have to look up the word Tawdry, it might be too big for you :( ).


That's not even an opinion.

Quote:
What else you got joset? Gonna go memorize more stuff like everybody else here? I have nothing against you, but you need to LEARN more about coherency (not just HT references) and stop memorizing White Papers like everybody else does.


Everything you wrote has nothing to do with Itanium's and Cell's virtues (or lack, thereoff). So, what's your point?

Actually, I'm willing to learn a lot, from this forum (not from your semantics, though!). But I do prefer to learn from anyone who's willing to share knowledge and debate about it. And "to learn" is not even half of the story; you've got to use your mind & THINK.

If I'm replying to you right now, it's because I respect you, as I respect everyone else. Please, do the same.
That's all.


Cheers!
March 30, 2006 3:08:18 PM

You sound like a college boy who's eager to make friends...I'll let it stand on that note.... :roll:

All the big fancy words....makes me chuckle, :lol: 

~~Mad Mod Mike, pimpin' the world 1 rig at a time
March 30, 2006 3:18:08 PM

Yeah, that makes sense to you.
March 30, 2006 9:01:11 PM

Quote:
you'll certainly find that the STI Consortium did not engage into such an innovative (to say the least!)


There's not much innovation.

Quote:
it's in their intentions to start pushing the CBE


Why would IBM keep investing in solutions where there are other people sharing in the IP? It's more profitable to go your own way.

Quote:
like the multi-media (...), at first...


The biggest non PS3 customer are medical hardware companies so far. And that's not a very large market.
March 31, 2006 12:04:07 AM

Quote:
you'll certainly find that the STI Consortium did not engage into such an innovative (to say the least!)


There's not much innovation.

You might want to have a look... or not:

http://arstechnica.com/news.ars/post/20060225-6265.html

http://www.google.pt/search?sourceid=navclient&ie=UTF-8&rls=GGLJ,GGLJ:2006-05,GGLJ:en&q=ibm+cell;

http://news.com.com/IBM+shows+Cell+blade+in+action/2100-1010_3-6048428.html,

for some examples... and, there's the IBM website, of course.

Quote:
it's in their intentions to start pushing the CBE


Why would IBM keep investing in solutions where there are other people sharing in the IP? It's more profitable to go your own way.

As far as I'm aware, IBM detains all the hardware's (Cell) & the software's (Octopiler) IP rights; only the implementations will be "shared". And Rambus' licensing its proprietary memory|memory controller|I/O bus, as well.

Quote:
like the multi-media (...), at first...


The biggest non PS3 customer are medical hardware companies so far. And that's not a very large market.

See last link.

I wish I invented it, but I didn't. I have to back up my words with the relevant references.

It might take a [long] while before the CBE reaches the desktop... if that'll happen at all. Nevertheless, it's IBM's intention to push it into the x86 space. That's written down.

Now, it'll be up to you to "decide" if Cell's worth it or not.

The defense rests. :lol: 


Cheers!
March 31, 2006 12:47:15 AM

Quote:
You might want to have a look... or not:


LOL. The PS3 isnt using any IBM compilers and PS3 devs have said they have no faith in it.

Your second link is to google. :roll:

Your third link is some PR crap. :roll:

I know about it. The sacrifices it makes for single precision FP and god awful DP FP are well crappy.

Quote:
As far as I'm aware, IBM detains all the hardware's (Cell) & the software's (Octopiler) IP rights;


I don't think thats the case, Toshiba did most of the groundwork on the SPE's.

Quote:
See last link.


And it tells me?

Quote:
It might take a [long] while before the CBE reaches the desktop... if that'll happen at all. Nevertheless, it's IBM's intention to push it into the x86 space. That's written down.


IBM similar architectures to Cell in development, with far less of the drawbacks and limitations. :roll:

Quote:
The defense rests.


What defense? :wink: :roll: Man my eyes are sore.
March 31, 2006 3:57:58 PM

Quote:
LOL. The PS3 isnt using any IBM compilers and PS3 devs have said they have no faith in it.

Your second link is to google. :roll:

Your third link is some PR crap. :roll:

I know about it. The sacrifices it makes for single precision FP and god awful DP FP are well crappy.

As far as I'm aware, IBM detains all the hardware's (Cell) & the software's (Octopiler) IP rights;


I don't think thats the case, Toshiba did most of the groundwork on the SPE's.

Quote:
See last link.


And it tells me?

Quote:
It might take a [long] while before the CBE reaches the desktop... if that'll happen at all. Nevertheless, it's IBM's intention to push it into the x86 space. That's written down.


IBM similar architectures to Cell in development, with far less of the drawbacks and limitations. :roll:

It's ok if you don't care about Cell (or Itanium, for what matters.).

I've posted those links intentionally, in order to provide both supporters' & detractors' views.

Actually, the first [Cell] patent was filed by two Sony scientists,

http://appft1.uspto.gov/netacgi/nph-Parser?Sect1=PTO2&Sect2=HITOFF&p=1&u=/netahtml/PTO/search-bool.html&r=1&f=G&l=50&co1=AND&d=PG01&s1=20020138637&OS=20020138637&RS=20020138637

which doesn't mean IBM doesn't retain [most of!] the IP rights (I'd have to search further).
And, here's a bit of Cell's history:

http://domino.research.ibm.com/comm/research.nsf/pages/r.arch.innovation.html

Sorry for your sore eyes, man.


Cheers!
March 31, 2006 4:52:21 PM

Itanium is a great architecture with a heap of potential, and also the most misunderstood architechure.

The whole IA-64 (6 issue) core is only 20 million transistors with one of the best FPUs in its class. Once IA-64 is available on 45nm is hit it will make sense to switch to its design from x86_64 (also on 45nm) for various reasons.

The IA-64 design has +50% more instructioning issuing capability than Conroe does per clock cycle.

It they made a 65nm Itanium IA-64 it would be the most powerful processor on the market. However they use 130nm (which can only house a quarter the transistors on equal die sizes).

Of course a 130nm Itanium is not going to have enough transistors to compete with 90nm (2x) and 65nm (4x) designs. Nor will it have the clock speed at 130nm being as complex as it is.

If you want to compare two processors 'potential', compare them on the same die size, with similar transistor counts. (eg: compare IA-64 to other 130nm processors, with similar transitor counts and thus costs).

Once you do, and assuming you understand the gains shrinking from 130nm to 65nm, or even 45nm, will bring to IA-64, you will come to appreciate the most misunderstood microarchitecture on the market.

Obviously news sites have simply no idea, as they all say it is bad without backing up their claims. (eg: they have little idea about the designs they claim to be savy with, 15 minutes reading some of the crap on the net confirms this).

Then all the anti-fanboys go spread the word that it is bad, without knowing for sure if it is, or with any credible information to indicate why.

IA-64 / Itanium is still really in a prototyping stage, Yeah they sell it, but why are Intel still selling 130nm processors, when they can manufacture 65nm ones with 4x the transistors.

IA-64 would certainly benefit from having 4x the number of cores, and 4x the cache, aswell as slightly higher clock speeds, All benefits a transition to 65nm can supply it.

Its FPU performance, transistor for transistor, is 2nd to none.... considering just how few transistors it has, it kicks most other processors on the market.

The other issue with it is lack of OS and lack of software support.

Franky I think every application, and parts of the OS(es) :p , in the world needs a clean slate, on a new architecture that forces 'correct coding'.

It also encourages people to be more resourceful with the hardware.

:?: Why do people hate Itanium, besides lapping up spoon fed shit from some media sources (ones that historically lack credibility at that :? ). I'd really like to see what people say.

Now that its benefits may be moving to AMD I bet every fanboy here will 'start liking it'... just to be cool or something... :roll:

(I earned the nickname "The Itanium Fanboy" in one of my early threads btw... even though I run a Opteron 270 I appreciate what IA-64 can offer).

A wider bus is better than a thin one. The interconnects in most CPUs to other parts, within the CPU, are almost all 128 bit or 256 bit wide. A 128-bit bus connected to dual-channel memory (128 bit wide) at the same clock speed is far better than having the Northbridge connection only be 64 bits wide but clocked higher.

IA-64:
CPU <--> 400 MHz x 128 bit <--> 400 MHz x 128 bit = 6.4 GB/sec - end to end

IA-32 / x86_64:
CPU <--> 800 MHz x 64 bit <--> 400 MHz x 128 bit = 6.4 GB/sec aswell.

However the northbrige needs to act as a translation point, and that delays it. Ironically, as such, the slower bus may have slightly better latency.

The IA-64 instuctions on average are about 3 times the length of x86 ones, thus it needs 3 times the cache to scale, in that respect, in a linear manner. That cache could be 4x the L2 cache, or a balance of L2 and L3, it makes little difference at the end of the day.

Cache coherency isn't an issue if you can fit 16+ cores within the one chip, and they all share the same cache, aswell as having CPU clocked interconnects between cores at 128 or 256 bits wide. (eg: 70 GB/sec+ interconnects).

The FPU on IA-64 could be made 4 times the size per core, or seperate IA-64 FPU cores (massive leap) could be implemented in 'spare' space at 65nm or 45nm. eg: 8 cores of 'each' CPU/ALU and FPU, with 32 - 64 MB of shared L2 / L3 cache.

I wouldn't be surprised if said engineers find themselves welcome back at Intel after 2 - 5 years at AMD either. 8) (Think 007).
March 31, 2006 5:02:52 PM

Why are we talking about cell and Itanium? These CPU are designed for different applications. The whole apples and oranges thing comes up. Cell has a one-track mind push one thing through as fast as possible I haven’t seen one in action but I would bring bet at multitasking it will fail. The processor will most likely be used for MP3 players and new portable gaming machines.

The Itanium is a “sever class” processor. I use the quotations because it was anything but that. Yes, it had some great points but it was still a let down. China bought a lot of Itanium servers then bought IBM servers a year later. I’ve been to China and they don’t just through money away that means major issues with the Itanium forced their hand.

Now AMD has a high up from the Itanium team means that most of the DDR2 issue can get fixed. Making sure that AMD can get what they want out of AM2 and newer projects. I think this is big news maybe Intel will jump in and fail suit to stop his employment. We haven’t seen all the specs on socket AM2 but I think this hiring was done to insure it’s success.
March 31, 2006 5:35:07 PM

hurrah, now AMD got a boost for itself, with better staff.

Good for Them but bad for intel
March 31, 2006 8:19:24 PM

Who says I don't care? Its a very average cpu thats hyped up as the second coming of jesus.

Its also good to see you ignored my points too.

Itanium is a dead end.
March 31, 2006 10:30:30 PM

Quote:
LOL. The PS3 isnt using any IBM compilers and PS3 devs have said they have no faith in it.

Your second link is to google. :roll:

Your third link is some PR crap. :roll:

I know about it. The sacrifices it makes for single precision FP and god awful DP FP are well crappy.

I don't think thats the case, Toshiba did most of the groundwork on the SPE's.

And it tells me?

IBM similar architectures to Cell in development, with far less of the drawbacks and limitations. :roll:


Ok.

Now, what points are you referring to? As far as I can see, there's this single one "The sacrifices it makes for single precision FP and god awful DP FP" (which is a good one, btw); but then, what?!

When you state
Quote:
Its a very average cpu thats hyped up as the second coming of jesus.
, what am I supposed to comment?! :lol: 

And, when TabrisDarkPeace posts a pretty decent (my opinion; although with some... debatable points!) view on Itanium, what's your point?!
Quote:
Itanium is a dead end.


What about "why", at least?

By no means am I ignoring you, mate. Just don't seem to find a worth debatable "point", yet. And, I picked up some interesting (?) links to try to bring some debate into the table...

Ok, I know it's off topic... but I'm not ignoring you.


Cheers!
March 31, 2006 10:42:18 PM

Quote:
Now, what points are you referring to? As far as I can see, there's this single one "The sacrifices it makes for single precision FP and god awful DP FP" (which is a good one, btw); but then, what?!


Well theres one and its ignored.

You also ignored the part about the innovative IBM compilers. :wink:

The part about IBM having similar but better architectures in the works. :wink:

Quote:
What about "why", at least?


Expensive and no-one is supporting it. EPIC is average at best.
April 1, 2006 12:39:30 AM

Quote:
The sacrifices it makes for single precision FP and god awful DP FP

Well theres one and its ignored.


Like in every architecture, there's always a flip side: in Cell's case, poor DP FP. BUT, it's an almost fully-programmable architecture, which leads to the next point:

Quote:
You also ignored the part about the innovative IBM compilers. :wink:


Are you sure you've gone through
http://arstechnica.com/news.ars/post/20060225-6265.html?

(And through IBM's website?)

Quote:
The part about IBM having similar but better architectures in the works. :wink:


Like the POWER6? If true, where's the similarity, [estimated] frequencies apart? Where does POWER6 combine a General Purpose Processor with an array of vector processing elements? (à la AMD/Clearspeed talk, for instance). Just to mention a couple of differences... or is it something else?

Quote:
What about "why", at least?


Expensive and no-one is supporting it. EPIC is average at best.

1st sentence: beside the [architectural] point (remember EV8).; 2nd sentence: explain «EPIC is average at best.», compared to what?

I guess I'm becoming laconic, as well... :D 


Cheers!
April 1, 2006 1:21:14 AM

Quote:
Like in every architecture, there's always a flip side: in Cell's case, poor DP FP. BUT, it's an almost fully-programmable architecture, which leads to the next point:


Its beyond that, no OOOe, SPE's are very limited in what they can do (well), assymetric design, etc.

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Are you sure you've gone through


Yes and as PS3 devs have said theres no magic bullet.

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Like the POWER6? If true, where's the similarity, [estimated] frequencies apart? Where does POWER6 combine a General Purpose Processor with an array of vector processing elements? (à la AMD/Clearspeed talk, for instance). Just to mention a couple of differences... or is it something else?


Well I don't know all the details on Power6, I'm just saying what IBM people have said.

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compared to what?


Anything.
April 1, 2006 1:40:31 AM

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(...) no OOOe, SPE's are very limited in what they can do (well), assymetric design, etc.

Yes and as PS3 devs have said theres no magic bullet.


No, just the Octopiler. There's really no such thing as a 'magic bullet' compiler, not even for the x86.

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compared to what?


Anything.

My shoes included? (I know: "Especially your shoes!")

It's 3,40 AM & I need to sleep.

I'll be back!


Cheers!
April 1, 2006 2:40:16 AM

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No, just the Octopiler. There's really no such thing as a 'magic bullet' compiler


Well yeah. It just relies on OpenMP hints at the moment for parallelization. Meh.

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My shoes included? (I know: "Especially your shoes!")


Probably.
April 1, 2006 3:20:30 PM

4 x 64 bit CPU != 256 bit CPU.


64 bit instuction set
64 bit adressing scope (well more like 40 bit physical, 48 bit virtual, still 2^40 is heaps more memory than will fit in one box for now).
64 bit, or greater, bus to memory

It just means you can run 4 isolated threads at once, or 8 if using dual-core.
April 1, 2006 3:39:59 PM

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I wouldn't be surprised if said engineers find themselves welcome back at Intel after 2 - 5 years at AMD either


Once you've worked with AMD, you won't go back at Intel. :wink:
April 1, 2006 3:48:04 PM

They share engineers all the time.

There are not enough microprocessor architecture specialists in the world to 'hoard' them all at one company.

They'll switch sides many times.

IA-64 has a future, ironically that future may be with AMD by 2012, if not before.

Conroe rocks because it is a 4-issue dual-core, with a short pipeline length, where older designs are 2/3 issue with longer pipelines.

IA-64 is an 11-issue, multi-core (at 65nm, 45nm), with a very short pipeline, compilers that boost performance heaps, and the ability to turn basic instructions into complex conditional checks so they only take 1 clock cycle instead of 3 or more.

A 2 GHz 4 x IA-64 would do about +15% MIPS compared to my current system. That really speaks for their architecture as come Itanium 3/4 it will be even more revamped. (the jump from Itanium 1 @ 800 MHz, to Itanium 2 @ 1600 MHz was more than double).
April 1, 2006 9:09:17 PM

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No, just the Octopiler. There's really no such thing as a 'magic bullet' compiler


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Well yeah. It just relies on OpenMP hints at the moment for parallelization. Meh.

Is that bad?


I'm not a programmer (and I wont be as laconic as you :D  );anyway, I mentioned this in another thread:

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As the "frame of reference" for most of the top-notch IT companies, whether by owning, partnering, licensing or by any other means sharing its enormous IP potential, IBM feeds - directly or otherwise - the R&D, the industry and, even, the manufacturing process & commercialization of many IT-related companies. Ironically, it's also a means of its subsistence & expansion.


and I believe IBM (& its partners) know the "whys", "whats", & "hows" of pushing such an ambitious & radical approach to [super]computing (maybe, they just don't know the "whens"...). And, x86 is not out of the question, as microarchitectures are becoming more RISC-like departures, with a high emphasis on SIMD vector-processing & compilers becoming more sophisticated & versatile.

http://www.interactivesupercomputing.com/product.php:

a math co-processor in the Desktop has about a little over 10 years; I'd find it hard (...) to discard a >250 GFLOPS in the Desktop space, within the next 5...

Certainly, you're aware of Cell's peculiarities, specs & potentialities; hence, there's no point in going "it's a different computing approach altogether" or "it's a very promising microarchitecture", etc, when most sentences regarding Cell, in this thread, end up with "crap/crappy/meh".

I rest my case with "Cell", in this thread. Moreover, it's off topic. :wink:


Cheers!
April 1, 2006 9:39:15 PM

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Is that bad?


Well its nothing new or great.

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as microarchitectures are becoming more RISC-like departures


By adding more complexity to hardware?

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Certainly, you're aware of Cell's peculiarities, specs & potentialities; hence, there's no point in going "it's a different computing approach altogether" or "it's a very promising microarchitecture", etc,


Well if you want to go into that, sure.
!