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This may be the ram of choice for AM2

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  • DDR2
  • RAM
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April 6, 2006 5:27:06 AM

This might be one of the top sellers for ddr2, with timings @ 3.2.2.9 not bad with the ability to go 4.5.4.15 @1000mhz. I'm sure much like Nvidia, AMD's stop over in ddr2 land won't be too long anyway with ddr3 on the horizon.

http://www.anandtech.com/memory/showdoc.aspx?i=2732

More about : ram choice am2

April 6, 2006 5:30:26 AM

Quote:
This might be one of the top sellers for ddr2, with timings @ 3.2.2.9 not bad for ddr800. I'm sure much like Nvidia, AMD's stop over in ddr2 land won't be long anyway with ddr3 on the horizon.

http://www.anandtech.com/memory/showdoc.aspx?i=2732


Those are worthless to a P4/Conroe, because even @ 1333MHz, the FSB can't handle that, and that's a FACT, not Fanboyism.

~~Mad Mod Mike, pimpin' the world 1 rig at a time
April 6, 2006 5:45:06 AM

Quote:


Those are worthless to a P4/Conroe, because even @ 1333MHz, the FSB can't handle that, and that's a FACT, not Fanboyism.

~~Mad Mod Mike, pimpin' the world 1 rig at a time


How do you know? As you have stated many times previously, conroe is not here yet.
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April 6, 2006 5:45:55 AM

I think it will make a much larger impact with AMD AM2. But the article claims that conroe will benefit as well. Since they nolonger use pukeburst.
April 6, 2006 5:49:22 AM

Quote:


Those are worthless to a P4/Conroe, because even @ 1333MHz, the FSB can't handle that, and that's a FACT, not Fanboyism.

~~Mad Mod Mike, pimpin' the world 1 rig at a time


How do you know? As you have stated many times previously, conroe is not here yet.

Uhm...you're not listening...the CPU has nothing to do with how fast it can access RAM you Moroff, if the FSB in a Conroe is 1066MHz or 1333MHz, let's do math, shall we?

1333x64/8=10,664MB/s - Max Extreme Edition FSB (Provided Intel can MAKE 3.33GHz Conroe w/ that bus)

800x128/8=12,800MB/s - Max T-Band for DDR2-800

Let's do an A64 for Sh!ts and giggles..

∞*800/8=(-∞,∞) Max T-Band. (You do understand Alg2, right?)

~~Mad Mod Mike, pimpin' the world 1 rig at a time
April 6, 2006 6:56:37 AM

Good assumption, but its all just theory until you plug it in and run the benches.

Remember: theory and reality don't always coincide
April 6, 2006 6:45:32 PM

Quote:
Good assumption, but its all just theory until you plug it in and run the benches.

Remember: theory and reality don't always coincide



.....Are you stupid?....That is a serious question, are you mentally challenged? I am not joking....

You don't understand anything, and that isn't an insult, but a concern. Please get help immediately.

~~Mad Mod Mike, pimpin' the world 1 rig at a time
April 6, 2006 7:10:47 PM

Taking a stab at this..

I guess what mike is saying..

Conroe can do 1333 FSB.

That DDR2 1000 (PC2 8000) is rated for 1000 FSB.

So, I would say... that would be harsh to try to push the memory another 333mhz.
April 6, 2006 7:11:51 PM

Quote:
Good assumption, but its all just theory until you plug it in and run the benches.

Remember: theory and reality don't always coincide


Math is not an assumption. He's telling you the actual maximum transfer rates of each.

The point he was trying to make is that the maximum transfer rate of Intels FSB at 1333MHz is not even equal to that of DDR2-800, much less DDR2-1000. So the extra speed for an Intel processor is worthless. Now the tighter timings would make a difference though.
April 6, 2006 7:14:49 PM

Quote:
Taking a stab at this..

I guess what mike is saying..

Conroe can do 1333 FSB.

That DDR2 1000 (PC2 8000) is rated for 1000 FSB.

So, I would say... that would be harsh to try to push the memory another 333mhz.


No, that's not what I'm saying, let me reiderate:

A front side bus of 1333MHz for Conroe provides 10,664MB/s because it is a 64-bit wide Data Bus (1333x64/8 ) and that is NOT theory, it is PHYSICAL limitation.

DDR2-800 is 800MHz and provides 12,800MB/s because it is 128-bit wide (In Dual Channel) and that is NOT theory, it is PHYSICAL limitation

The Athlon64 Memory Controller is UNLIMITED bandwidth (as fast as the RAM is) and therefore it is ∞ (also known as INFINITY) ∞*RAM/8=∞ that is the NON-THEORY bandwidth, but PHYSICAL limitation.

DDR2-1066 is 17GB/s+, and if you get there, you'd need almost a 2GHz FSB on Conroe to get that, whereas an A64 can handle that with nothing new, see the limitation?

~~Mad Mod Mike, pimpin' the world 1 rig at a time
April 6, 2006 7:19:44 PM

You beat me to finishing my edit.
April 6, 2006 7:23:17 PM

Quote:
Taking a stab at this..

I guess what mike is saying..

Conroe can do 1333 FSB.

That DDR2 1000 (PC2 8000) is rated for 1000 FSB.

So, I would say... that would be harsh to try to push the memory another 333mhz.


No, that's not what I'm saying, let me reiderate:

A front side bus of 1333MHz for Conroe provides 10,664MB/s because it is a 64-bit wide Data Bus (1333x64/8 ) and that is NOT theory, it is PHYSICAL limitation.

DDR2-800 is 800MHz and provides 12,800MB/s because it is 128-bit wide (In Dual Channel) and that is NOT theory, it is PHYSICAL limitation

The Athlon64 Memory Controller is UNLIMITED bandwidth (as fast as the RAM is) and therefore it is ∞ (also known as INFINITY) ∞*RAM/8=∞ that is the NON-THEORY bandwidth, but PHYSICAL limitation.

DDR2-1066 is 17GB/s+, and if you get there, you'd need almost a 2GHz FSB on Conroe to get that, whereas an A64 can handle that with nothing new, see the limitation?

~~Mad Mod Mike, pimpin' the world 1 rig at a time

Ahhh.... I'm jumping through too many posts.

Yes I see... I think:

(1333)10664<(800)12800<AM2(1066)17000.
April 6, 2006 7:27:11 PM

Quote:
You beat me to finishing my edit.


Hehehe, I'm a fast typer ;)  (over 110wpm fyi ;) )

I think it's necessary for this too:

An "Expert" is going to come in here and lambast me about Woodcrest, so I have taken the liberty upon myself to shoot them down before they can start:

Woodcrest w/ DIB (2 FSB's):

1333MHzx2=2666MHz (Provided they are Linerally/Striped scaled, which I DOUBT severely). That's 2666x64/8=21,328MB/s Max T-Band, that's farely nice...

Let's look @ the FB-DIMM's it's going to use....

The max channels for FB-DIMM's is Six-Channel, so let's use 1000MHz as our base for this...

1000x384/8=48,000MB/s Max T-Band for FB-DIMM DDR2-1000 (Provided the MC on the NB ever SCALES that high, highly unlikely as well).

So now we got 21GB/s and 48GB/s....hmm....see a problem here?....

Now let's look at a Socket F Dual CPU AMD Opteron 64 setup...

2 CPU's = 2 Memory Controllers (The 1207 pins can allow for almost 4 MC's per CPU, but we won't go there) and thus is now ∞*∞ for Memory Bandwidth limitation....Let's do more math....

48GB/s per Node x2 = 96GB/s Max T-Band for Dual Opty 64's using FB-DIMM DDR2-1000, use NUMA to aggregate the Memory, and you're lookin at REAL-WORLD bandwidth of over 85GB/s....compared to Woodcrest REAL-WORLD of, say, 16GB/s....

Yea.....you see now how the FSB is a PoS....

~~Mad Mod Mike, pimpin' the world 1 rig at a time
April 6, 2006 7:36:21 PM

I'm getting too old for this ****. :cry: 
April 6, 2006 7:49:20 PM

interesting math, dude. Nice work.

I agree the FSB is pretty crappy. Have known about it's bad limitations for quite a while. But...

question... why the assumption of 384? or 6*64. What if it is 128? I don't know whether or not it will be 128bit or 64bit. Do you know?

thanks
April 6, 2006 7:53:50 PM

Quote:
interesting math, dude. Nice work.

I agree the FSB is pretty crappy. Have known about it's bad limitations for quite a while. But...

question... why the assumption of 384? or 6*64. What if it is 128? I don't know whether or not it will be 128bit or 64bit. Do you know?

thanks


Good question, let me go find out.

EDIT: Found out, it is 72-bit, I'll post again with updated speeds.
EDIT2: The FSB is still 64-bit (IIRC) but FB-DIMM's are 72-bit, which means it's even WORSE than what I posted, LOL.

~~Mad Mod Mike, pimpin' the world 1 rig at a time
April 6, 2006 7:58:05 PM

**UPDATE USING CORRECT FB-DIMM DATA WIDTHS**

Woodcrest w/ DIB (2 FSB's):

1333MHzx2=2666MHz (Provided they are Linerally/Striped scaled, which I DOUBT severely). That's 2666x64/8=21,328MB/s Max T-Band, that's farely nice...

Let's look @ the FB-DIMM's it's going to use....

The max channels for FB-DIMM's is Six-Channel, so let's use 1000MHz as our base for this...

1000x432/8=54,000MB/s Max T-Band for FB-DIMM DDR2-1000 (Provided the MC on the NB ever SCALES that high, highly unlikely as well).

So now we got 21GB/s and 54GB/s....hmm....see a problem here?....

Now let's look at a Socket F Dual CPU AMD Opteron 64 setup...

2 CPU's = 2 Memory Controllers (The 1207 pins can allow for almost 4 MC's per CPU, but we won't go there) and thus is now ∞*∞ for Memory Bandwidth limitation....Let's do more math....

54GB/s per Node x2 = 108GB/s Max T-Band for Dual Opty 64's using FB-DIMM DDR2-1000, use NUMA to aggregate the Memory, and you're lookin at REAL-WORLD bandwidth of over 95GB/s....compared to Woodcrest REAL-WORLD of, say, 16GB/s....

Yea.....you see now how the FSB is a PoS....

~~Mad Mod Mike, pimpin' the world 1 rig at a time
April 6, 2006 8:09:58 PM

...
April 6, 2006 8:12:05 PM

Owned. :lol: 
April 6, 2006 8:14:47 PM

Quote:
Good assumption, but its all just theory until you plug it in and run the benches.

Remember: theory and reality don't always coincide


Math is not an assumption. He's telling you the actual maximum transfer rates of each.

The point he was trying to make is that the maximum transfer rate of Intels FSB at 1333MHz is not even equal to that of DDR2-800, much less DDR2-1000. So the extra speed for an Intel processor is worthless. Now the tighter timings would make a difference though.

True. I have a slight divergence - isn't math technically theoretical? I remember hearing that somewhere...
April 6, 2006 8:16:01 PM

Quote:
Good assumption, but its all just theory until you plug it in and run the benches.

Remember: theory and reality don't always coincide


Math is not an assumption. He's telling you the actual maximum transfer rates of each.

The point he was trying to make is that the maximum transfer rate of Intels FSB at 1333MHz is not even equal to that of DDR2-800, much less DDR2-1000. So the extra speed for an Intel processor is worthless. Now the tighter timings would make a difference though.

True. I have a slight divergence - isn't math technically theoretical? I remember hearing that somewhere...

2+2=4...but could it be 65???? Hmm...Nope, it's 4.

~~Mad Mod Mike, pimpin' the world 1 rig at a time
April 6, 2006 8:38:15 PM

The only math that could technically be theoretical is the math they come up with when they can't solve something so they in essence make it up. But no one can prove that they're wrong so the answer becomes right. Ready to shoot yourself in the head yet?
April 6, 2006 9:16:58 PM

Quote:
interesting math, dude. Nice work.

I agree the FSB is pretty crappy. Have known about it's bad limitations for quite a while. But...

question... why the assumption of 384? or 6*64. What if it is 128? I don't know whether or not it will be 128bit or 64bit. Do you know?

thanks


Good question, let me go find out.

EDIT: Found out, it is 72-bit, I'll post again with updated speeds.
EDIT2: The FSB is still 64-bit (IIRC) but FB-DIMM's are 72-bit, which means it's even WORSE than what I posted, LOL.

~~Mad Mod Mike, pimpin' the world 1 rig at a time

yeah... cuz the FSB still runs at 21GBs/sec :roll: it just really sucks....
a c 105 à CPUs
April 6, 2006 11:25:00 PM

A few other things do use the memory bandwidth, especially if you have integrated video and to a much lesser extent, Ethernet and sound. But yes, a 1333MHz FSB should mean that anything above DDR2-800 in dual channel is overkill.
April 6, 2006 11:26:52 PM

Quote:
A few other things do use the memory bandwidth, especially if you have integrated video and to a much lesser extent, Ethernet and sound. But yes, a 1333MHz FSB should mean that anything above DDR2-800 in dual channel is overkill.


DDR2-800 is already overkill, I wouldn't recommend anything above DDR2-667 unless you're overclocking.

Another thing to note, in a Dual CPU Woodcrest, CPU Coherency also has to eat away the bandwidth of the FSB.

~~Mad Mod Mike, pimpin' the world 1 rig at a time
a c 105 à CPUs
April 6, 2006 11:28:59 PM

From what I remember, you have a 1GHz double-pumped 128-bit full-duplex link to the integrated memory controller in an Athlon 64 via HyperTransport.

That gives us )1000MHz * 2 accesses/cycle * 128 bits/access * 2 directions) / 8 bits/byte = 64 GB/sec maximum. It is not inifinity, but the CPU can sure pull a lot of stuff off of the memory in short order.
April 6, 2006 11:31:53 PM

Quote:
From what I remember, you have a 1GHz double-pumped 128-bit full-duplex link to the integrated memory controller in an Athlon 64 via HyperTransport.

That gives us )1000MHz * 2 accesses/cycle * 128 bits/access * 2 directions) / 8 bits/byte = 64 GB/sec maximum. It is not inifinity, but the CPU can sure pull a lot of stuff off of the memory in short order.


Hmm...interesting theory, but I am positive it is false because the Memory Controller bus is independent of HyperTransport and the fact that I can lower HTT to 600MHz (1200MHz effective) and still get RAM bandwidth exceeding HTT bandwidth, and therefore, infinity is only because it's as fast as your RAM is.

What is this 2 accesses/cycle? HTT is 1GHz, 16-bit Links Full Duplex (2GHz 32-bit Data Width), and that means 8GB/s Total.

~~Mad Mod Mike, pimpin' the world 1 rig at a time
a c 105 à CPUs
April 7, 2006 12:00:46 AM

Oops. I thought it was 128-bit wide and double-pumped. I guess not.
April 7, 2006 12:20:38 AM

Quote:
Oops. I thought it was 128-bit wide and double-pumped. I guess not.


Most people don't include the 2nd 1GHz Link as they say "it's just marketing", but if you do the math, without that 2nd link (it's 1 link, but Full Duplex, so really the 2nd Plex) it's not right:

1GHz Full Duplex = 2000MHz

2000x32/8=8000MB/s Bandwidth

Each Plex is 16-bit 1000MHz, and both are absolutely required for this speed of the FSB, so the FSB IS 2GHz.

~~Mad Mod Mike, pimpin' the world 1 rig at a time
April 7, 2006 1:37:50 AM

I'm not going to mention FSB since we've discussed this before.

I was just wondering where you found that FB-DIMM was 72-bit? I thought that FB-DIMM had the same bandwidth as the equivalent clock speed DDR2 RAM and would be 64-bit also.

http://www.pcstats.com/articleview.cfm?articleid=1812&p...

Here they list the 800MHz variety producing a throughput of 6400MB/s which corresponds with FB-DIMMs working with 64-bit data. The other 8-bits are probably ECC checking with the memory controller.
April 7, 2006 3:40:39 AM

Quote:
I'm not going to mention FSB since we've discussed this before.

I was just wondering where you found that FB-DIMM was 72-bit? I thought that FB-DIMM had the same bandwidth as the equivalent clock speed DDR2 RAM and would be 64-bit also.

http://www.pcstats.com/articleview.cfm?articleid=1812&p...

Here they list the 800MHz variety producing a throughput of 6400MB/s which corresponds with FB-DIMMs working with 64-bit data. The other 8-bits are probably ECC checking with the memory controller.


interesting link....

I thought something was a little one sided about the FSB/memory controller deal. They're gonna take care of the FSB problem just fine.
April 7, 2006 4:45:03 AM

MMM if intel suddenly had hyper-transport, just like AMD, then who do you think would have the faster cpu?
April 7, 2006 6:01:05 AM

Quote:
2+2=4...but could it be 65???? Hmm...Nope, it's 4.


That's hilarious.
April 7, 2006 6:52:41 AM

So what if you have a fast memory to pull data from but you cant process it fast enough. The data will still end up sitting there waiting for the CPU to process the previous load. The bottle neck is now the CPU not the memory; quote from TG latest article Tight Timings vs High Clock Frequencies:

"To accurately answer the question we asked earlier in this article - namely, whether to go for tight timings or high clock frequencies - one should conduct the tests using a very fast CPU to eliminate bottlenecks. It is our opinion that even our overclocked 2610 MHz dual core Opteron wasn't really fast enough to do more than hint at a possible victory for tight timings at even higher CPU clock frequencies"

If you think memory was a deciding factor, then the double size in L2 cache from the Athlon64 to the Opteron should make a huge jump in performance. But I don't see it. Same goes for a Pentium D 800s to a D 900s.

SuperPI score shows everyone that Conroe is one hell of a processing unit. May be if Athlon64s start running at 4ghz+, then I will worry about DDR2 1000 low latency.

If AMD believes in ram speed like it's fans do, they would just skip DDR2 entirely and jump right on DDR3 instead. With the price that people asking for these DDR2 1000, one may as well buy DDR3 if they can. Main advantages of DDR2 over DDR1 are less voltage ( less energy ) and cheaper price in the future.
April 7, 2006 7:11:34 AM

The 64 vs 72 bit difference on the RAMs is for any potential ECC.

The link from CPU to NthBrj/FSB does not require it.

The link from NthBrj/FSB to RAM does though (just in case it is present, assuming the chipset supports ECC in the 1st place).

If Intel fatten the FSB it will help them significantly, they'll need to make CPUs with higher pin counts though, ditto with Northbridge.

Even a 96 bit wide link to the northbride could get them to 12.8 GB/sec (inclusive of overheads), which is ample in most cases. The link could be split into 3 x 32 bit 'buses' each half-duplex, so reads and writes to/from the MCH (NorthBridge) could be performed at once.

Or more ideally a 128 bit wide link to MCH, split into 2 x 64 bit links for somewhere in the window of 12.8 GB/sec to 21.3 GB/sec.

As memory sub-system performance approaches 16 GB/sec the bottleneck becomes the processor. (At least for todays processors, in 10 years the numbers will rise). Even a fration of this with enough prefetching will suffice fine in most applications, including games.

A large database sitting in physical memory would benefit from more. But little else would.

Remember that 20% of the code does 80% of the work, with enough cache and look-ahead / branch prediction, etc latency becomes less and less important.

Reading just 256 bytes (or any block larger than this) from memory, one is better off with higher clocked memory, than lower latency, lower clocked memory. As this is prefetched before required the latency is very effectively 'hidden'.

When/If we have CL6 RAM, going to CL7 won't seam like such a big deal for the clock speed gains. :wink:
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