It is known by some that nVidia wanted to have an plug-in graphics chip. Could cHT be leveraged to only use PCIEx for a monitor port? It was something I was thinking about after the announcements of several co-processors for ASIC/FPGA-type software.
It seems that graphics could be afforded even more bandwidth AND RAM if connected to cHT since in a dual board each socket has a connection to usually 4 slots - up to 16 GB (DDR2 will come in 4GB sizes soon).
I know this is kind of a graphics post but cHT is based on a CPU bus so what do people think?
That would make for seriously powerful CAD stations and maybe make things like PhysX even faster.
It seems that graphics could be afforded even more bandwidth AND RAM if connected to cHT since in a dual board each socket has a connection to usually 4 slots - up to 16 GB (DDR2 will come in 4GB sizes soon).
I know this is kind of a graphics post but cHT is based on a CPU bus so what do people think?
That would make for seriously powerful CAD stations and maybe make things like PhysX even faster.