PCI's=133MBps which means in one second it can move 127MBs!

[Codesmith]

I got bored and did some research on the PCI bus.

First one who answers these two questions right and can correctly explain their answers gets this week's anal-retentive geek award!

1) What's the theoretical maximum transfer rate for the PCI bus in MBps?
2) How many MBs can the PCI bus theoretically transfer in one second?

PS I automatically get this month's award for doing the research and posting this thread.

 

[chuckshissle]

The PCI bus was released by Intel in June, 1992. Since then, almost all PC expansion peripherals, such as hard disks, sound cards, LAN cards, and video cards have been using the PCI bus. The thing is, the PCI bus maximum transfer rate - 133 MB/s – proved to be insufficient for modern 3D applications and it represented a limitation to the development of more sophisticated video cards. In order to solve that issue, Intel created a new bus, called AGP, to increase the transfer rate of video cards – now they wouldn’t have to be installed in the PCI bus anymore, but in the AGP bus, which is faster. Then the PCI was not so “busy” anymore, since video cards were the great responsible for the intense traffic in the PCI bus.

 

[chuckshissle]

P.S. What is "anal-rententive geek" means? To me it sounds like a homo nerd.

You know what don't give me that award, Im straight.

 

[chuckshissle]

ALL ABOUT PCI LOCAL BUS


The PCI (Peripheral Component Interconnect) is a high performance Bus for interconnecting chips, expansion boards, and memory cards. It was originated at Intel Inc. In the early 1990’s as standard methods of interconnecting chips on a board. It was later adopted as an industry standard administered by the PCI Special Interest Group or the PCI SIG.

History:
It was first adopted for use in personal computers in about 1994 with Intel’s introduction of the chip named ?Saturn for the 486 microprocessor. With the introduction of chips and motherboards, PCI began to replace the then industry standard ISA bus. On September 11, 1998 the Special Interest Group formed of Compaq, Hewlett-Packard and IBM had submitted a new specification for review called PCI-X. The proposed standard allows for increase in PCI bus speeds to 133 MHz.


The Bus:
The basic form of the PCI presents a fusion of sorts between ISA and VL-Bus. It provides direct access to system memory for connected devices, but uses a ?bridge to connect to the frontside bus and therefore to the CPU. Basically, this means that it is capable of even higher performance than VL-Bus while eliminating the potential for interference with the CPU. PCI can connect more devices than VL-Bus, up to five external components. Each of the five connectors for an external component can be replaced with two fixed devices on the motherboard. Also, you can have more than one PCI bus on the same computer, although this is rarely done. The PCI bridge chip regulates the speed of the PCI bus independently of the CPU's speed. This provides a higher degree of reliability and ensures that PCI hardware manufacturers know exactly what to design for.
PCI originally operated at 33 MHz using a 32-bit-wide path. Revisions to the standard include increasing the speed from 33 MHz to 66 MHz and doubling the bit count to 64. Currently, PCI-X provides for 64-bit transfers at a speed of 133 MHz for an amazing 1-Gbps (gigabit per second) transfer rate.

PCI cards use 47 pins to connect provided there is a CPU. The PCI bus is able to work with so few pins because of hardware ?multiplexing, which means that the device sends more than one signal over a single pin.. The connectors at the end of the card are connected to the motherboard slot and are called gold fingers.

Although Intel proposed the PCI standard in 1991, it did not achieve popularity until the arrival of Windows 95 (in 1995). This sudden interest in PCI was due to the fact that Windows 95 supported a feature called Plug and Play (PnP). PCI supports devices that use either 5 volts or 3.3 volts.

PCI Bus Performance
The PCI bus provides superior performance to the VESA local bus; in fact, PCI is the highest performance general I/O bus currently used on PCs. This is due to several factors:


Burst Mode:
The PCI bus can transfer information in a burst mode, where after an initial address is provided multiple sets of data can be transmitted in a row. This works in a way similar to how cache bursting works.

Bus Mastering:
PCI supports full bus mastering, which leads to improved performance.

High Bandwidth Options:
The PCI bus specification 2.1 calls for expandability to 64 bits and 66 MHz speed; if implemented this would quadruple bandwidth over the current design. In practice the 64-bit PCI bus has yet to be implemented on the PC (it does exist in non-PC platforms such as Digital Equipment's Alpha and is also found now on servers) and the speed is currently limited to 33 MHz in most PC designs, most likely for compatibility reasons.

The Speed of the PCI bus
can be set ?synchronously or asynchronously, depending on the chipset and motherboard. In a synchronized setup (used by most PCs), the PCI bus runs at half the memory bus speed; since the memory bus is usually 50, 60 or 66 MHz, the PCI bus would run at 25, 30 or 33 MHz, respectively. In an asynchronous setup, the speed of the PCI bus can be set independently of the memory bus speed. This is normally controlled through jumpers on the motherboard, or BIOS settings. Overclocking the system bus on a PC that uses synchronous PCI will cause PCI peripherals to be overclocked as well, often leading to system stability problems.

The PCI-X 2.0 specification defines two new versions of PCI-X add-in cards: PCI-X 266 and PCI-X 533.
PCI-X 266, runs at speeds up to 266 Mega transfers per second, enabling sustainable PCI bandwidth of more than 2.1 Gigabytes/second.
PCI-X 533 runs at speeds up to 533 Mega transfers per second enabling bandwidth of more than 4.2 Gigabytes/second.
PCI Technical information
PCI is basically a 5 volt, 33MHz, 32-bit bus with a basic data transfer rate of 133 Mb/s.
PCI also has many design options which can be combined in any permutation.:

64-bit bus extension - basic data transfer rate of 266Mb/s
66-MHz extension - doubles basic data transfer rate.
3.3v operation - via a different physical connector.
"MiniPCI" connector for laptops and PDA’s
Physical Connector


Most readers should be familiar with the connector variation pictured above - this is the 'standard' PCI slot found in most x86 IBM PC clones. This connector represents the most basic PCI implementation - 32bit, 33MHz, 5 volt. The 3.3 volt implementation looks the same, except the plastic polarization key is located at the 'top' end, rather than the 'bottom' end.
The 64-bit implementation are about 50% longer; a second connector is butted up against the end of the standard connector, with the plastic ends of the two connectors forming a second polarization key. The 64-bit extension always operates at 3.3 volts. Some motherboard erroneously label the 64-bit extension as a 'Media' connector.
PCI Cards are the 'mirror' of traditional IBM-PC ISA bus cards; that is the components are fitted on the opposite side of the card. The PCI connector aligns with the right hand edge of the expansion slot, whereas ISA connects align with the left hand edge. This means that motherboards can be designed with a 'shared' slot - if the ISA and PCI connectors are placed side by side, either an ISA card OR a PCI card can be fitted, but not both at the same time. This is often done to save space on a motherboard, yet try to offer the end user as much flexibility as possible to fit whatever selection of cards the user may have in mind.
Each PCI ?slot consists of a multiplex address and data bus, four interrupt lines, +5v, +3.3v +12v and -12v power supply lines, card presence sensing, test and control lines. PCI does not support DMA in the 'traditional' IBM-PC sense, however bus mastering replaces the hold up, utilizing the functionality of DMA when required.
PCI sports a number of improvements rarely found in earlier system expansion bus designs:


Jumperless Configuration:

devices are configured by software means only (A few lazy, stupid vendors do break the rules, though). All devices are required to report in unambiguous terms their system ?resource requirements:
Memory ranges
I/O addresses
DMA channels
Interrupts
etc
Device Identification:

devices must identify themselves by their assigned manufacturer and device codes, as well as reporting their class codes.
Manufacturer codes are administered by a central authority - the PCI SIG.
Class codes aim to provide a basic identification of a device, so that 'generic' system driver software can form some basic understanding and even provide basic control of the device (in the absence of device-specific driver software).
Platform Independence:

PCI can be implemented on almost any computing platform, not just the IBM-PC/x86 architecture. Many non-PC vendors are adopting PCI, Apple and SUN for instance.
Mini PCI
The Mini PCI specification defines an alternate implementation for small form factor PCI cards referred to in this specification as a Mini PCI card. This specification uses a qualified subset of the same signal protocol, electrical definitions, and configuration definitions as the Conventional PCI Specification. Where this specification does not explicitly define PCI characteristics, the Conventional PCI specification governs.
The primary differences are:

The form factor of the card and card and slot connections, that is, the smaller physical size of the Mini PCI card and the connectors it uses.
Support of the CLKRUN# signal defined in the PCI Mobile Design Guide
No support for optional JTAG signals
The use of standard sideband signals for audio and communications
No support for the 64-bit PCI extension defined in Conventional PCI

 

[Codesmith]

Today, however, the term is often used of anybody seen as overly worried about small details and unable to adopt a philosophical attitude toward mistakes. This metaphorical usage has become so commonplace that the somewhat graphic literal meaning of the phrase is often overlooked by those using it.

However in deference to those uncomfortable with the term "anal" the award of "week's geek most worried overly worried about small details" is also avaliable.

As an added bonus anyone answering both question using the special secret notiation that everyone is supposed to use but almost no one does, [/quote]can name their pick their own title as long as it contains the word geek and is at least partially derogatory.

Here is a hint.

Your ISP and the CD manufacturers would get the answers right. Your web browser and the DVD manufacturers would get the answer wrong.

BTW yesterday I would have only answered one of the two questions correctly, but I would have gotten both right ten years ago.

 

[Codesmith]

The PCI bus has a maximum transfer rate of 133 MBps
The PCI bus can at most transfer 127MBs in one second.

The different answers have nothing to do with efficiency, parity bits, encoding schemes or other overhead.

As a hint for the reasons, another way of answering the second question would be to use the special "secret" 127MiB notation.

 

[Codesmith]

Might as well just explain it just in case someone cares.

Computers Storage is measured with 1 GB = 1024 MB = 1024 KB

Frequencies are meassued with the stardard 1000 based notation.

There are two ways this is fixed

1 By Convention
All Computer storage units are in 1024 based prefixes, except when it involves a time unit, then its standard 1000 base prefixes.

So the bus is 133MBps and the data moved in one second is 127MB's.

2 By Special Notation. All the 1024 prefixes get a little i at the end.

So the bus is 133Mbps and the data moved in one second is 127MiB's

The problems is

1) No one follows the convetion

You ISP measures correctly, your webbrowser doesn't.
Memory and CDs are measured correctly, DVDs and Hard Drives are not.

2) No one uses the "i" notation. So you you never know if an M is an M or an Mi.

I just now finally found a good PC speed reference chart that isn't ambigous about the measurments.

http://amdg.no-ip.org/slackware/slackstuff/speedcharts.htm

 

[lbax]

W:
This was an issue long before the formation of the evil empire. Billy was still in diapers!

 

[angry_ducky]

ALL ABOUT PCI LOCAL BUS


The PCI (Peripheral Component Interconnect) is a high performance Bus for interconnecting chips, expansion boards, and memory cards. It was originated at Intel Inc. In the early 1990’s as standard methods of interconnecting chips on a board. It was later adopted as an industry standard administered by the PCI Special Interest Group or the PCI SIG.

History:
It was first adopted for use in personal computers in about 1994 with Intel’s introduction of the chip named ?Saturn for the 486 microprocessor. With the introduction of chips and motherboards, PCI began to replace the then industry standard ISA bus. On September 11, 1998 the Special Interest Group formed of Compaq, Hewlett-Packard and IBM had submitted a new specification for review called PCI-X. The proposed standard allows for increase in PCI bus speeds to 133 MHz.


The Bus:
The basic form of the PCI presents a fusion of sorts between ISA and VL-Bus. It provides direct access to system memory for connected devices, but uses a ?bridge to connect to the frontside bus and therefore to the CPU. Basically, this means that it is capable of even higher performance than VL-Bus while eliminating the potential for interference with the CPU. PCI can connect more devices than VL-Bus, up to five external components. Each of the five connectors for an external component can be replaced with two fixed devices on the motherboard. Also, you can have more than one PCI bus on the same computer, although this is rarely done. The PCI bridge chip regulates the speed of the PCI bus independently of the CPU's speed. This provides a higher degree of reliability and ensures that PCI hardware manufacturers know exactly what to design for.
PCI originally operated at 33 MHz using a 32-bit-wide path. Revisions to the standard include increasing the speed from 33 MHz to 66 MHz and doubling the bit count to 64. Currently, PCI-X provides for 64-bit transfers at a speed of 133 MHz for an amazing 1-Gbps (gigabit per second) transfer rate.

PCI cards use 47 pins to connect provided there is a CPU. The PCI bus is able to work with so few pins because of hardware ?multiplexing, which means that the device sends more than one signal over a single pin.. The connectors at the end of the card are connected to the motherboard slot and are called gold fingers.

Although Intel proposed the PCI standard in 1991, it did not achieve popularity until the arrival of Windows 95 (in 1995). This sudden interest in PCI was due to the fact that Windows 95 supported a feature called Plug and Play (PnP). PCI supports devices that use either 5 volts or 3.3 volts.

PCI Bus Performance
The PCI bus provides superior performance to the VESA local bus; in fact, PCI is the highest performance general I/O bus currently used on PCs. This is due to several factors:


Burst Mode:
The PCI bus can transfer information in a burst mode, where after an initial address is provided multiple sets of data can be transmitted in a row. This works in a way similar to how cache bursting works.

Bus Mastering:
PCI supports full bus mastering, which leads to improved performance.

High Bandwidth Options:
The PCI bus specification 2.1 calls for expandability to 64 bits and 66 MHz speed; if implemented this would quadruple bandwidth over the current design. In practice the 64-bit PCI bus has yet to be implemented on the PC (it does exist in non-PC platforms such as Digital Equipment's Alpha and is also found now on servers) and the speed is currently limited to 33 MHz in most PC designs, most likely for compatibility reasons.

The Speed of the PCI bus
can be set ?synchronously or asynchronously, depending on the chipset and motherboard. In a synchronized setup (used by most PCs), the PCI bus runs at half the memory bus speed; since the memory bus is usually 50, 60 or 66 MHz, the PCI bus would run at 25, 30 or 33 MHz, respectively. In an asynchronous setup, the speed of the PCI bus can be set independently of the memory bus speed. This is normally controlled through jumpers on the motherboard, or BIOS settings. Overclocking the system bus on a PC that uses synchronous PCI will cause PCI peripherals to be overclocked as well, often leading to system stability problems.

The PCI-X 2.0 specification defines two new versions of PCI-X add-in cards: PCI-X 266 and PCI-X 533.
PCI-X 266, runs at speeds up to 266 Mega transfers per second, enabling sustainable PCI bandwidth of more than 2.1 Gigabytes/second.
PCI-X 533 runs at speeds up to 533 Mega transfers per second enabling bandwidth of more than 4.2 Gigabytes/second.
PCI Technical information
PCI is basically a 5 volt, 33MHz, 32-bit bus with a basic data transfer rate of 133 Mb/s.
PCI also has many design options which can be combined in any permutation.:

64-bit bus extension - basic data transfer rate of 266Mb/s
66-MHz extension - doubles basic data transfer rate.
3.3v operation - via a different physical connector.
"MiniPCI" connector for laptops and PDA’s
Physical Connector


Most readers should be familiar with the connector variation pictured above - this is the 'standard' PCI slot found in most x86 IBM PC clones. This connector represents the most basic PCI implementation - 32bit, 33MHz, 5 volt. The 3.3 volt implementation looks the same, except the plastic polarization key is located at the 'top' end, rather than the 'bottom' end.
The 64-bit implementation are about 50% longer; a second connector is butted up against the end of the standard connector, with the plastic ends of the two connectors forming a second polarization key. The 64-bit extension always operates at 3.3 volts. Some motherboard erroneously label the 64-bit extension as a 'Media' connector.
PCI Cards are the 'mirror' of traditional IBM-PC ISA bus cards; that is the components are fitted on the opposite side of the card. The PCI connector aligns with the right hand edge of the expansion slot, whereas ISA connects align with the left hand edge. This means that motherboards can be designed with a 'shared' slot - if the ISA and PCI connectors are placed side by side, either an ISA card OR a PCI card can be fitted, but not both at the same time. This is often done to save space on a motherboard, yet try to offer the end user as much flexibility as possible to fit whatever selection of cards the user may have in mind.
Each PCI ?slot consists of a multiplex address and data bus, four interrupt lines, +5v, +3.3v +12v and -12v power supply lines, card presence sensing, test and control lines. PCI does not support DMA in the 'traditional' IBM-PC sense, however bus mastering replaces the hold up, utilizing the functionality of DMA when required.
PCI sports a number of improvements rarely found in earlier system expansion bus designs:


Jumperless Configuration:

devices are configured by software means only (A few lazy, stupid vendors do break the rules, though). All devices are required to report in unambiguous terms their system ?resource requirements:
Memory ranges
I/O addresses
DMA channels
Interrupts
etc
Device Identification:

devices must identify themselves by their assigned manufacturer and device codes, as well as reporting their class codes.
Manufacturer codes are administered by a central authority - the PCI SIG.
Class codes aim to provide a basic identification of a device, so that 'generic' system driver software can form some basic understanding and even provide basic control of the device (in the absence of device-specific driver software).
Platform Independence:

PCI can be implemented on almost any computing platform, not just the IBM-PC/x86 architecture. Many non-PC vendors are adopting PCI, Apple and SUN for instance.
Mini PCI
The Mini PCI specification defines an alternate implementation for small form factor PCI cards referred to in this specification as a Mini PCI card. This specification uses a qualified subset of the same signal protocol, electrical definitions, and configuration definitions as the Conventional PCI Specification. Where this specification does not explicitly define PCI characteristics, the Conventional PCI specification governs.
The primary differences are:

The form factor of the card and card and slot connections, that is, the smaller physical size of the Mini PCI card and the connectors it uses.
Support of the CLKRUN# signal defined in the PCI Mobile Design Guide
No support for optional JTAG signals
The use of standard sideband signals for audio and communications
No support for the 64-bit PCI extension defined in Conventional PCI

Holy f*cking sh!t; that's the longest post I've ever seen. Did you just copy and paste it or did you actually write it?

 

[RichPLS]

Might as well just explain it just in case someone cares.

Computers Storage is measured with 1 GB = 1024 MB = 1024 KB

Frequencies are meassued with the stardard 1000 based notation.

There are two ways this is fixed

1 By Convention
All Computer storage units are in 1024 based prefixes, except when it involves a time unit, then its standard 1000 base prefixes.

So the bus is 133MBps and the data moved in one second is 127MB's.

2 By Special Notation. All the 1024 prefixes get a little i at the end.

So the bus is 133Mbps and the data moved in one second is 127MiB's

The problems is

1) No one follows the convetion

You ISP measures correctly, your webbrowser doesn't.
Memory and CDs are measured correctly, DVDs and Hard Drives are not.

2) No one uses the "i" notation. So you you never know if an M is an M or an Mi.

I just now finally found a good PC speed reference chart that isn't ambigous about the measurments.

http://amdg.no-ip.org/slackware/slackstuff/speedcharts.htm

That is an excellent post, and it never hurts to rehash your skills a bit, time seems to fade details.

 

[Codesmith]

Its a bit sad because I took computer hardware/networking classes and at the time I knew the rules about when an M is a million and when its 1024^2. Ten years latter I completely forgot.