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Is Conroe gonna be 64 bit??

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May 28, 2006 8:27:51 PM

This may be a stupid question but is Conroe gonna be 64 bit.

More about : conroe gonna bit

May 28, 2006 8:32:53 PM

Quote:
This may be a stupid question but is Conroe gonna be 64 bit.


Memrom: Mobile Core 2 Duo: Isn't a 64-bit compatable Processer.

Conroe: Desktop Core 2 Duo: It supports 64-bit

Woodcrest: Server Core 2 Duo: It supports 64-bit
May 28, 2006 8:35:11 PM

sorry I guess I'm a dumbass
Related resources
May 28, 2006 9:40:26 PM

Quote:
This may be a stupid question but is Conroe gonna be 64 bit.
Yes, Conroe, Woodcrest and Merom are all 64-bit.
May 28, 2006 9:50:16 PM

Heh... wouldn't the correct answer be more like:

Newer processors like Conroe, Core Duo, WoodCreast, and even AMD 64, Opteron, 64 X2 Processors are not true 64 bit CPUs, but have 64 bit extension to be able to run 64 bit OS/Applications?
May 28, 2006 10:23:17 PM

Quote:
Heh... wouldn't the correct answer be more like:

Newer processors like Conroe, Core Duo, WoodCreast, and even AMD 64, Opteron, 64 X2 Processors are not true 64 bit CPUs, but have 64 bit extension to be able to run 64 bit OS/Applications?

Depends what you mean with "true" 64 bit CPUs.
For example, the MIPS series of CPUs (used on Silicon Graphics workstations, in the past), which can arguably be considered true 64 bit RISC CPUs, can perfectly run in a "true" 32 bit mode on a 32 bit OS.
May 28, 2006 11:06:51 PM

Well.. I guess I'm just stuck on the thought of 32bit OS.

I know Linux 64 bit OS are out there running, and Vista on the verge to be released, but running 64 bit apps are another thing that is not vastly available yet.

So I just see todays processors having the ability to run 64 bit OS, but I see them as a true 32bit CPU with 64 bit registers.

The topic does say "Is Conroe gonna be 64 bit??".

So... are Conroe Generation, and AMD64 CPU a true 64 bit processor?
May 29, 2006 12:05:50 AM

Yes they can run 64-bit code. The extensions were just to keep the existing architecture and it allows backwards compatibility. They can run 3sbit code, PURE 64bit code, and allow a combination of the two allowing Windows 64 to run legacy applications.
May 29, 2006 12:51:04 AM

K8 was AMD's first-gen 64bit proc. What follows in the next 3-9 months will bring more x86-64 instructions to the table as well as other improvements with their second-gen 64bit chip.
Netburst had a reverse-engineered version of X86-64 but the ALU's ran at 1/2 speed so it was never really useful outside of Xeon's which required large amounts of RAM(never even needed as the physical adresse extention was already there for more memory than xeon boards ever supported).
Now Conroe is 64bit and I imagine its the same basic concept as the P4's since they are pin/socket/chipset compatible and Intel has admittingly given up on trying to create their own x86-64 however it is still unknown how it will handle large amounts of memory and if it will be suffer any similar issues that netburst did when in 64bit mode.
May 29, 2006 12:53:06 AM

64-bit may be the only place AMD can really compete, other than 4-8 way servers.
May 29, 2006 12:54:52 AM

Quote:
This may be a stupid question but is Conroe gonna be 64 bit.


Memrom: Mobile Core 2 Duo: Isn't a 64-bit compatable Processer.

Conroe: Desktop Core 2 Duo: It supports 64-bit

Woodcrest: Server Core 2 Duo: It supports 64-bit

Edit: Memrom Core 2 Duo Supports 64-Bit, The Core Duo "yonah" does'nt

Question: What Was the point of Core Duo??? If Core 2 Duo Replaced it within a year
May 29, 2006 12:57:01 AM

Quote:
K8 was AMD's first-gen 64bit proc. What follows in the next 3-9 months will bring more x86-64 instructions to the table as well as other improvements with their second-gen 64bit chip.
Netburst had a reverse-engineered version of X86-64 but the ALU's ran at 1/2 speed so it was never really useful outside of Xeon's which required large amounts of RAM(never even needed as the physical adresse extention was already there for more memory than xeon boards ever supported).
Now Conroe is 64bit and I imagine its the same basic concept as the P4's since they are pin/socket/chipset compatible and Intel has admittingly given up on trying to create their own x86-64 however it is still unknown how it will handle large amounts of memory and if it will be suffer any similar issues that netburst did when in 64bit mode.


Correct me if I am wrong, but I thought the 64-bit extenstions were added mid way throught the Netburst product lifecycle and the ALUs run at 2x the speed of the core....

Jack

My understanding of it is that the ALU's do in fact run at 2x speed in 32bit mode but revert back to 1x speed when in 64bit mode.


Ask p4man, spud, or possibly AM if they know for clarification.
May 29, 2006 1:01:01 AM

First I've heard about it. Spud knows the P4 better, I'm more into the P3 and K7/8
May 29, 2006 1:06:39 AM

Quote:

Question: What Was the point of Core Duo??? If Core 2 Duo Replaced it within a year

What is the point of any processor, when a better one replaces it in a year?

It is the nature of the industry. Nothing wrong with that, chips get better, new products are released, repeat.
May 29, 2006 1:08:46 AM

You asking the wrong question. Yonah was always on the roadmap and got released on shedule. Conroe/Merom are getting realeased much earlier than Intel could have ever hoped for which cuts-short core's lifespan.
May 29, 2006 1:08:55 AM

Quote:
Question: What Was the point of Core Duo??? If Core 2 Duo Replaced it within a year


To lay down the law so they can bring out merom later and get woodcrest and conroe out first. To test 65nm with a new architecture. To make money.
May 29, 2006 3:53:06 AM

Quote:
Memrom: Mobile Core 2 Duo: Isn't a 64-bit compatable Processer.

Conroe: Desktop Core 2 Duo: It supports 64-bit

Woodcrest: Server Core 2 Duo: It supports 64-bit


First its, Merom.
Second, the other CPUs like Conroe, Woodcrest is MEROM-DERIVATIVE, meaning anything Conroe and Woodcrest has, Merom will have it. Exception is SMP support, since it doesn't make sense to have SMP capable laptop.

EDIT: I apologize if it sounds harsh. I think the above makes it clear, so I put it up. Whether he meant it or not he will now be corrected. But some others may think the information is right, which isn't.
May 29, 2006 4:08:09 AM

Quote:
Let me ask, are you getting frustrated with the amount of mis-information that gets spewed around -- not just here, but in general ?


Yes, I guess so. Problem is not the mis-information, but the people spreading mis-information sound like what they are saying is correct. And selectively choosing benchmarks, while same people criticize Intel for selectively choosing benchmarks.

Like how some few ignorant posters in various sites say that Prescott runs hot because of 90nm. Not knowing there are different ones like Dothan. Not knowing that Prescott has approximately 3x logic transistors compared to Northwood. Various things like that. And the rumors spread, faster than the ones that are right.
May 29, 2006 5:17:43 AM

Why is the D900 series so much cooler?
Way was the 600 series cooler than the 500?
May 29, 2006 5:30:43 AM

Cute! So, if you keep the same voltage, but make the transistors smaller, and closer together, they have less I losses.
Nice lesson. Thanks!!
May 29, 2006 6:28:30 AM

Quote:
This may be a stupid question but is Conroe gonna be 64 bit.


Memrom: Mobile Core 2 Duo: Isn't a 64-bit compatable Processer.

Conroe: Desktop Core 2 Duo: It supports 64-bit

Woodcrest: Server Core 2 Duo: It supports 64-bit

Actually MEROM will be 64-bit. That's the difference between it and Yonah, not to mention its 2:1 power/performance rating over Yonah.
May 29, 2006 7:26:42 AM

Quote:
Endyen is trying to be an expert in manufacturing technology

Endyen is being an observer of the obvious, and living up (down?) to being included in the horde.
We all know that prescott was the wrong design at the wrong time. However, to say that the process used on the 805D would not have made the heat issue a lot less important, is truly ...
May 29, 2006 7:45:51 AM

Quote:
Second, what are "I losses", I am assuming you mean leakage current

Good guess.
Quote:
if you only scale point by point without scaling voltage, power will go up as well as leakage. You are completely wrong here.

No, bothe the 800 and 900 series use the same voltage range, 1.25 to 1.4.
Quote:
Did you create duplicate accounts

No, did you?
May 29, 2006 8:52:59 AM

Quote:
P4 820 @ 2.8 Vcore = 1.40
P4 920 @ 2.8 Vcore = 1.33

P4 830 @ 2.8 Vcore = 1.40
P4 920 @ 2.8 Vcore = 1.33

5% lower voltage on a die shrink is irrelevent.
I dont give a rat's rectum about FX-62 prices, and really not at release.
What question.
May 29, 2006 9:18:37 AM

And you claimed the FX would cost $1200 when the 6700 costs 530.
Damn right I called FUD.
And no matter what you say, had the prescott been released on the process used for the 805D, it would have been a lot less of a disaster.
No, I do not think that Intel's process sucks. I also do not feel that heat is the only reason prescott is less than wonderful.
It was a bad design made worse by a process that was not ready.
May 29, 2006 9:26:42 AM

Your own link puts the FX-62 at $1100 now Buy Aug23rd, who knows. As to anyone being able to pick up a conroe off the shelf, for the same price the OEM's pay, not bloody likely, especially at release.
(see my edit to the earlier post)
May 29, 2006 9:38:27 AM

Quote:

Correct me if I am wrong, but I thought the 64-bit extenstions were added mid way throught the Netburst product lifecycle and the ALUs run at 2x the speed of the core....

Jack


My understanding of it is that the ALU's do in fact run at 2x speed in 32bit mode but revert back to 1x speed when in 64bit mode.


Ask p4man, spud, or possibly AM if they know for clarification.
I can confirm that the ALUs operate at 2x clock ("double pumped") in 32 bit mode.
However this works only for the most simple instructions, as far as i remember only ADD and logical, while MUL is slow.
I'm not sure how they implemented 64bit mode, but it's likely that it operates at half the speed, as it would have taken a way bigger effort to redesign the double pumped ALUs not to limit the core clock speed in this mode.
May 29, 2006 9:39:27 AM

Quote:
And you claimed the FX would cost $1200 when the 6700 costs 530.
Damn right I called FUD.

I claimed the FX-62 1200, and the 6700 is 530... I posted links to back those up. The links to prices above justify that reality, reality is not FUD.

http://www.ncix.com/products/index.php?sku=18452&vpn=AD...



This is one of the biggest, and cheapest places to buy in Canada. Take into

consideration, the 90c dollar, and it still works out to about $1380US. Ouch

I'll take a Conroe, please, and mobo, and RAM, and PSU....and still have

enough left to buy a beer,to celebrate my wise allocation of funds.:wink:
May 29, 2006 10:07:39 AM

Quote:
And you claimed the FX would cost $1200 when the 6700 costs 530.
Damn right I called FUD.

I claimed the FX-62 1200, and the 6700 is 530... I posted links to back those up. The links to prices above justify that reality, reality is not FUD.

http://www.ncix.com/products/index.php?sku=18452&vpn=AD...



This is one of the biggest, and cheapest places to buy in Canada. Take into

consideration, the 90c dollar, and it still works out to about $1380US. Ouch

I'll take a Conroe, please, and mobo, and RAM, and PSU....and still have

enough left to buy a beer,to celebrate my wise allocation of funds.:wink:

Oh this goes back to a post where I argued why would anyone buy a $1200 CPU that performs 20% slower than a $530 CPU. Endyen called FUD and said it would be $1000, I then referenced the links where the projected prices would fall for the FX-62 -- this is where they are falling. Ok so take a $1000, would you buy one?

He counters that at release of Conroe the FX-62 will fall, that is likely... but that is not what he said.

I was deeply offended being labeled a FUD maker because a) that is the same, in my opinion, as questioning someone's integrity, b) anything I post may be challenged (kindly) and if I am mistaken I will publically go back and correct it -- it was not a kind remark. c) I did in fact gather my data and I was correct in the street price from the channel. d) I always reference the data when necessary to support my claims. Because he can't understand it does not necessarily make it untrue.

Also, he is completely wrong about the 90 nm process.... I would like him to qualify his assertions with actual data, or at least explain why two different architectures sandwich the AMD products on the power curve. The answer is quite simple. :) Just thought i'd shock the SH*T out

of you's with the prices up here. That's 2 months of mortgage payments

for me. 8O (P+I+T).
May 29, 2006 10:08:31 AM

First ,do you mean netburst because most people think the P4c was fairly good.
May 29, 2006 10:19:33 AM

It is exactly one mortgage payment for me, which explains why I will never buy an FX, and why I prefer Anitec.
May 29, 2006 10:40:47 AM

Try looking up netburst, if you dont want to use my clicky. Netburst referrs to all P4s, not just prescott.
As to power, sorry, you are wrong Power is I squared R So .95*.95= .90, or 90%. Of course leakage current on a die shrink is a little over 5% increase, so there goes all of your gains, plus a little. Then again, there is one metric that remained the same, but it only accounts for 5% of losses, so that cant be it.
You want me to prove that Intel has upgraded thier process since 2003?
Read THG's review of the scotty 3.4. Then think about whether the 840 is always throttled. Then think about how the 805D can clock to 3.6 on stock hsf.
Maybe you are right though. Maybe Intrl hasn't been able to improve thier process in over 3 years.
May 29, 2006 11:57:42 AM

Quote:

As to power, sorry, you are wrong Power is I squared R

Duh',
P = V*I
V = R*I
P = R*I*I
P = (V*V)/R

So how can you say that he's wrong?
Beside, this is like, electrotechnics for morons.
There are so many more power equations, depending on which domain you're operating (frequency, Laplace, etc).
Also, it should be Z, not R, as we're definitely not talking about DC current.
May 29, 2006 12:47:54 PM

Quote:
This may be a stupid question but is Conroe gonna be 64 bit.


Yep. All new CPUs (not counting the ones destined for PDAs and cell phones) will will be 64 bit. Yonah (commonly called Core Duo) will probably be the last Intel processor produced that does not support 64 bit extensions.
May 29, 2006 1:15:29 PM

Quote:
Try looking up netburst, if you dont want to use my clicky. Netburst referrs to all P4s, not just prescott.
As to power, sorry, you are wrong Power is I squared R So .95*.95= .90, or 90%. Of course leakage current on a die shrink is a little over 5% increase, so there goes all of your gains, plus a little. Then again, there is one metric that remained the same, but it only accounts for 5% of losses, so that cant be it.
You want me to prove that Intel has upgraded thier process since 2003?
Read THG's review of the scotty 3.4. Then think about whether the 840 is always throttled. Then think about how the 805D can clock to 3.6 on stock hsf.
Maybe you are right though. Maybe Intrl hasn't been able to improve thier process in over 3 years.


No, wrong. Selective picking. Put it another way, you are only comparing Netburst. How about Pentium M for a change?? Transistor performance!=processor performance(performance in terms of clock speed and power)

They DID improve process, they do it half way before new process. Get it right before posting.

Power has LOTS of metrics, not just I*R. Did you learn anymore about anything like that since elementary school?? Physics teaches you there is more. Electronics tell you even more.

Formula for CPUs: Power=Dynamic Capacitance*Voltage*Voltage*Frequency, so its

P=C*V*V*F
May 29, 2006 3:08:44 PM

Well lookie there. . . a human Oscope. Now I've seen it all :p 

We're always testing and tweaking the process. That never stops.
May 29, 2006 5:10:09 PM

Quote:
K8 was AMD's first-gen 64bit proc. What follows in the next 3-9 months will bring more x86-64 instructions to the table as well as other improvements with their second-gen 64bit chip.
Netburst had a reverse-engineered version of X86-64 but the ALU's ran at 1/2 speed so it was never really useful outside of Xeon's which required large amounts of RAM(never even needed as the physical adresse extention was already there for more memory than xeon boards ever supported).
Now Conroe is 64bit and I imagine its the same basic concept as the P4's since they are pin/socket/chipset compatible and Intel has admittingly given up on trying to create their own x86-64 however it is still unknown how it will handle large amounts of memory and if it will be suffer any similar issues that netburst did when in 64bit mode.


Correct me if I am wrong, but I thought the 64-bit extenstions were added mid way throught the Netburst product lifecycle and the ALUs run at 2x the speed of the core....

Jack

My understanding of it is that the ALU's do in fact run at 2x speed in 32bit mode but revert back to 1x speed when in 64bit mode.


Ask p4man, spud, or possibly AM if they know for clarification.

2x clock speed executing 16bit stacks.
May 29, 2006 5:46:54 PM

Quote:
Try looking up netburst, if you dont want to use my clicky. Netburst referrs to all P4s, not just prescott.
As to power, sorry, you are wrong Power is I squared R So .95*.95= .90, or 90%. Of course leakage current on a die shrink is a little over 5% increase, so there goes all of your gains, plus a little. Then again, there is one metric that remained the same, but it only accounts for 5% of losses, so that cant be it.
You want me to prove that Intel has upgraded thier process since 2003?
Read THG's review of the scotty 3.4. Then think about whether the 840 is always throttled. Then think about how the 805D can clock to 3.6 on stock hsf.
Maybe you are right though. Maybe Intrl hasn't been able to improve thier process in over 3 years.


THG knows about as much about semiconductor device physics as Julia Childs... let's leave them out of this please.

DavidC1 quote the formulation for power, I will reformulated it here:

P=CV^2F Where C is the total cumulative capacitance, V is voltage, and F is frequency. Now do't take our word for it, why don't you actually read the reference I provided earlier:

http://www.cs.technion.ac.il/~mendlson/l7-circuit/Desig... challenges of technology scaling.pdf
(Copy paste link into browser line, Forumz software does not like spaces).

the actual equation and the affect on scaling is shown on page 26. This equation does not include the static power, but that is irrelevant if I simply want to know the relative improvement in dynamic power simply by using a lower voltage.

I can calculate P1 @ 1.33 volts as well as P2 @ 1.40 volts

P1 = C(1.33)^2*F
P2 = C(1.40)^2*F

Now, what I said is that lowering voltage gives you better power all things being equal then the ratio of high to low is:

P2/P1=C/C (V2/V1)^2*(F/F) = (V2/V1)^2

Thus P2/P1 = (1.40/1.33)^2 = 1.11

(oops I miscalculated it is 11% -- hey it was 2:00 AM in the morning when I punched it in).

11% improvement in power is simply by lowering the voltage 0.07 volts is not insignificant. That's just the V in the equation, scaling helps C too. Intel's 90 nm provides better dynamic power characteristics than AMD's by a substantial margin.

So, now turning to your point about leakage, just where do you believe all the leakage is coming from? Intel did not scale down the gate thickness, they shallowed up the junction so it did not come from there, so where?

Intel has improved their process significantly, it still out performs AMD's, it is shaping up to out perform AMDs at 65 nm (AMD's data is not that impressive). And by make such a suggestion "Maybe your right, yada yada no improvement in 3 years, blah blah etc. etc." is a typcial tatic of the HORDE, one reason your are member, and if you cannot understand simple physics and, as it is quite evident you are unwilling to learn, you will constantly get bombarded by responses like those above. You are making yourself look foolish.

Jack


u geeks :D 
May 29, 2006 5:56:53 PM

Quote:

u geeks :D 


agreed :D 
May 30, 2006 12:47:34 AM

Quote:
2x clock speed executing 16bit stacks.


Silly question maybe but, 2 ALUx2 execute 2*16 stacks per cycle (32bits); 2 ALUx1, 2*32 stacks per 2 cycles (64bits), I presume. Is this correct?


Cheers!
May 30, 2006 6:45:28 AM

Sorry, dont know the dinamic capacitance of either chip, so I cant use your formula. Glad you sort of agreed with me (11 is closer to 10 than 16)
I believe you are the one who told me that the primary source for C was transistor to transistor. AFAIK, decreasing the dieelectric will cause increased leakage.
What I have been trying to prove since my first post, is that the current Intel process (on 90 nanos) is better than when prescott was released.
I would even go so far as to say that, had prescott had today's process (again, on 90 nanos) at that time, the whole story would have changed. Prescott would have scaled better, and the whole "heat problem" would have been a non-issue.
Am I wrong?
May 30, 2006 6:57:53 AM

Quote:

Prescott would have scaled better, and the whole "heat problem" would have been a non-issue.
Am I wrong?


That would've been no fun though. It's nice that my processor has a nickname(preshott). :wink: It's a processor that will go in the record books. Maybe not for reason's we would have liked, but being the
hottest 90nm furnace in the world is cool(pun intended). Even makes
a nuclear reactor look tame, if you take the size of the reactor/the heat
output. 8O
May 30, 2006 7:31:40 AM

The problem is that more stages = more pathways transistor to transistor = more paths = more wires = more resistance = more loss. That loss was deemed acceptable on paper but reality had other plans. :evil: 
May 30, 2006 7:36:37 AM

But, using today's process, how far do you think a single core prescott could scale on 90 nanos?
May 30, 2006 7:56:01 AM

Quote:
But, using today's process, how far do you think a single core prescott could scale on 90 nanos?


90nm ...who know's, but i'd bet the farm if they built a single core

prescott on 65nm, and judging by 670 O/C's, they could safely put out

a 4.8-5.0 Ghz chip (and likely 300 FSB w/975) and still put out less heat

than a 670. :o  Still wouldn't compete with Conroe, but would give current

S939 and AM2 the fits. :wink:
May 30, 2006 8:02:18 AM

Quote:
I would even go so far as to say that, had prescott had today's process (again, on 90 nanos) at that time, the whole story would have changed. Prescott would have scaled better, and the whole "heat problem" would have been a non-issue.
Am I wrong?


Nah. It would have scaled better but they have a much better choice now. No point of going there when they have Core microarchitecture.

Remember, even with 65nm, heat is still an issue, and even moreso with power consumption.


Prescott's problem is the amount of logic transistors it has. It has 125 million in total with 1MB L2, while Northwood has 55 million with 512KB L2. The number of logic transistors increased by 2.5x, and I heard the circuitry is even more power consuming than Willamette/Northwood did.
May 30, 2006 8:03:32 AM

Quote:
90nm ...who know's, but i'd bet the farm if they built a single core

prescott on 65nm, and judging by 670 O/C's, they could safely put out

a 4.8-5.0 Ghz chip (and likely 300 FSB w/975) and still put out less heat

than a 670. Still wouldn't compete with Conroe, but would give current

S939 and AM2 the fits.


Actually they do have that. It's called Cedarmill. Though its actually 65nm Prescott 2M.

However, they will get competitive anyway with the price cuts they are coming with.
May 30, 2006 8:11:43 AM

Quote:
90nm ...who know's, but i'd bet the farm if they built a single core

prescott on 65nm, and judging by 670 O/C's, they could safely put out

a 4.8-5.0 Ghz chip (and likely 300 FSB w/975) and still put out less heat

than a 670. Still wouldn't compete with Conroe, but would give current

S939 and AM2 the fits.


Actually they do have that. It's called Cedarmill. Though its actually 65nm Prescott 2M.

However, they will get competitive anyway with the price cuts they are coming with.

Duh...i'll be okay...i hope. :oops:  That'll teach me to game, and read the forums at the same time. :?
May 31, 2006 12:34:49 AM

Quote:
2x clock speed executing 16bit stacks.


Silly question maybe but, 2 ALUx2 execute 2*16 stacks per cycle (32bits); 2 ALUx1, 2*32 stacks per 2 cycles (64bits), I presume. Is this correct?


Cheers!

One 32bit operation (32bit+32bit) is broken down to 4 16bit operations (16bit+16bit next cycle 16bit+16bit) by the ALU decoder. The ALU units can only do add sub 16bit operations, which are completed in 1 full clock cycle. Flags are then used on the outputs from the ALU's then off to the branch check. What I don't know for certain is whether the ALU's output is reorder to the original (32bit+32bit) operation or if the branch check stage does it. But I will certainly contact Intel if anyone is genuinely interested.

One 64bit operation (64bit+64bit) is broken down into 8 16bit operations (16bit+16bit next cycle 16bit+16bit next cycle 16bit+16bit next cycle 16bit+16bit). Flags are added, branch check, drive.
May 31, 2006 1:51:43 AM

Quote:
2x clock speed executing 16bit stacks.


Silly question maybe but, 2 ALUx2 execute 2*16 stacks per cycle (32bits); 2 ALUx1, 2*32 stacks per 2 cycles (64bits), I presume. Is this correct?


Cheers!

One 32bit operation (32bit+32bit) is broken down to 4 16bit operations (16bit+16bit next cycle 16bit+16bit) by the ALU decoder. The ALU units can only do add sub 32bit operations, which are completed in 1 full clock cycle. Flags are then used on the outputs from the ALU's then off to the branch check. What I don't know for certain is whether the ALU's output is reorder to the original (32bit+32bit) operation or if the branch check stage does it. But I will certainly contact Intel if anyone is genuinely interested.

One 64bit operation (64bit+64bit) is broken down into 8 16bit operations (16bit+16bit next cycle 16bit+16bit next cycle 16bit+16bit next cycle 16bit+16bit). Flags are added, branch check, drive.

Thanks for the reply.

Do the K8 ALUs work the same way, since I understand it's a true 64-bit uArch?

(Pretty interesting question you've got there; but, don't bother to contact Intel just because of me...)


Cheers!
!