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AMD's Plans for the Future

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June 2, 2006 11:31:33 PM

AnandTech has a great summary of AMD's plans for the near future.

http://www.anandtech.com/cpuchipsets/showdoc.aspx?i=276...

Specifically, I want to draw attention to the details on the upcoming K8L architecture.

http://www.anandtech.com/cpuchipsets/showdoc.aspx?i=276...

First of all claims about the doubling of floating point and SSE resources are correct. However, it isn't exactly as what it appears to be. My understanding of the K8 design philosophy was that every execution unit would be given its own port so that there could not be any conflicts. In this case, AMD has shied away from this approach and has decided to have 2 FPUs and 2 SSE units share 2 ports which is a more Intel approach. This should mean that the potential of these additional units isn't as great (ie. less than 100% performance increase), but some of that is offset by 1 cycle 128bit operation assuming the code is taking advantage of that. I'd be interested to know if the FPU and SSE units that share the same ports are share any resources that may impair their ability to operate in parallel.

Also, at first I was impressed by the marketing of the dual 128-bit loads per cycle, but it appears that this is just a euthamism for the widening of the data buses to 256bit. This will bring K8L in line with Intel designs which have used 256bit buses for quite sometime. Still, this should lead to a much needed increase in bandwidth to supply this enhanced core.

http://www.realworldtech.com/page.cfm?ArticleID=RWT0602...

Quote:
Additionally, it is easy to deduce, based on information about the load/store units that the bus between the L1 and L2 caches has been widened to 256 bits.

Integer resources have not been increased and so performance improvements there will come from other areas such as the better caches and improved out of order operation. However, what AMD is adding in regard to the latter is the ability for loads to pass previous loads. This ability has been present since the P6 and PM. K8L will not be able to allow loads pass previous stores as Core can.

Quote:
The load/store units also have somewhat more flexible execution; they can re-order loads with respect to other loads (although loads cannot move around stores).

I of my concerns about the way AMD is implementing their quad core is the size of the caches. I know AMD is proud that their architecture doesn't need to rely on the "brute force" approach of large caches, but that still isn't a reason to decrease the cache size. The quad cores will only have 512kB of cache per core. Even on AMD's architecture, going to 1MB of L2 cache does make a performance difference which is why all the Opterons have them. Now AMD is expanding their cores which requires more bandwidth with lower latency to feed it and they are decreasing their L2 cache count. There is a L3 cache, but it's only 2MB and 512kB of L2 cache + 512kB of higher latency L3 cache per core is not equivalent to 1MB of L2 cache. It's great that going to DDR2 doubles the available bandwidth from memory, but it'd be better to try to avoid the RAM subsystem as much as possible to begin with. I think the reduced cache size is a consequence of AMD projecting that they may be manufacturing constrained. This isn't a bad thing necessarily since it means they are selling as fast as they're making chips, but it means they have to sacrifice cache to save transistors to improve yields.

Overall, K8L is a great improvement over K8, but I really don't see it completely dominating Core. We'll have to see who's better (probably not significantly) closer to launch since clock speeds and other factors of course some into play. In platform terms though, AMD's HyperTransport approach is really blooming with an addition link per Opteron, unganging ability and the HTX slot.

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June 3, 2006 12:17:24 AM

K8L is still a speculation....... 8O
June 3, 2006 12:22:37 AM

Yeha but K8L sounds Lightyears Better than Overclocked Core 2 Duo ExtremeEdition
Related resources
June 3, 2006 12:28:33 AM

Quote:
Yeha but K8L sounds Lightyears Better than Overclocked Core 2 Duo ExtremeEdition


Actually I am an AMD fans.
But before K8L hits the street, I don't think AMD can easily get the performance crown back.
June 3, 2006 2:13:15 AM

Quote:

But before K8L hits the street, I don't think AMD can easily get the performance crown back.

Yes and no.
Once four cores are introduced into mainstream computing platforms which will happen in a few months, the ball will be in Intel's court to come up with an innovative way to make their four core systems compete.
June 3, 2006 2:33:31 AM

I just can't see 4 cores becoming mainstream until they are all on the same cpu die. Until then, dual cpu setups will occupy a very small fraction of sales, mainly just to enthusiasts and professionals. For mainstream use this AMD 4x4 just isn't the answer that AMD needs. Sure it will find its niche, but will never make it to the masses.

Face it, 4 cores is just so completely overkill for the average user. Its just not necessary for the mainstream --- Yet........
June 3, 2006 2:37:03 AM

Quote:


Let's move the topic off the 4x4 please (for some reason I want to call this a Tonka Truck), this should focus on the K8L. :) 


Jack



Sir, Yes Sir!!!!!!
June 3, 2006 2:40:26 AM

Quote:
“Captain!” exclaimed Lt. Worf.

“Yes, what is it Mr. Worf?”, Captain Picard firmly but softly replied.

“Long-range sensors have detected a strange anomaly straight ahead”, Worf looked mildly stern but not worried as Klingons never worry of pending danger or battle.

Before Picard could announce the next order, William Riker, the handsome bearded bridge officer second in command to the Intelprise chimed in. “Shall I call for a red alert Captain”

“No, number one, not just yet – it appears harmless enough. Lt. Commander Data, could you provide an explanation of what is out there?” Picard asked.

“Certainly Captain”, Data then worked to access the ship’s main computer having recently been equipped with the 802.11n protocol the bandwidth and speed of the query was astonishing, within seconds (an eternity to an android), Data had his answer.

“The strange anomaly detected by the long-range sensors is a K8L-plan” Data explained.

“And what is this K8L-plan Data?” Picard asked, a definite inquisitiveness in his tone.

“Captain, the K8L-plan is an odd and very rare occurrence in the universe, while detectable, it is not tangible. That is to say it is something and nothing at the same time” Data replied.

Picard looked puzzled, “I do not fully understand Data, please explain.”

“The K8L-plan is based upon nothingness but it consists of 50% hope, 40% prayer, 8% intelligent design, and 2% BS. In the present form we see here it is nothing more than a ghost trapped in the vacuum of space, but could potentially mutate into something.”

After a slight pause, Picard responds, “I don’t believe we should take any chances. Mr. Worf, please ready the Core 2 Torpedos.”

With a ever so slight hint of glee, Worf asks, “Shall I arm them with Macro-fusion Captain?”.

“Yes Mr. Worf, please do, we need to be sure.”

“Aye, Sir.” Within moments, Worf declares “The Core 2 is ready Captain”

“Thank you Mr. Worf, fire.”

Within a split second the bridge main view screen turned bright white from the explosion as the Core 2 Torpedeo impacted upon it’s target.

“Captain, the K8L-plan has been destroyed.”

Standing up, with his characteristic slight tug of the uniform, Captain Picard turned to Data and said “Well done Lt. Commander Data, well done”. :wink:

Seriously, nice post.


That was very entertaining! How long did it take you to write that?
June 3, 2006 3:02:38 AM

Looks very solid, it should scale (clockspeed wise) very nicely.
June 3, 2006 3:09:26 AM

Quote:
“Captain, the K8L-plan has been destroyed.”


Only to later find out the Core2Torp in fact led to a mutation of the K8L, that being the K8XS, which changed the world, led to harmony and balance in the universe and its near-infinite bandwidth helped solve the riddle of cold fusion. Intel lost market share and went the way of the Edsel and the Dodo. And in my old age, I even became handsome.

As long as we were exploring fantasy, I thought I'd just throw all that in for extra credit fun.
a c 132 à CPUs
a b À AMD
June 3, 2006 3:41:15 AM

where are the borg damnit!!!!!

on the topic of 4X4 i will get it :)  only if it can beat or = intels offering.....
glad i help off on my quad opteron setup (it was hard not to just get the parts)
June 3, 2006 3:51:27 AM

Quote:
where are the borg damnit!!!!!

The borg took over the starship Itanium and are lost somewhere in the universe, convinced they have already assimilated everyone.
June 3, 2006 3:58:00 AM

Did I walk into a star trek convention or something? :p 
June 3, 2006 4:23:54 AM

Just thought I'd also add for those that are wondering, Rev G is not K8L. It is simply a 65nm die shrink of the K8 Rev F.

http://www.hkepc.com/bbs/itnews.php?tid=608464&starttim...

The first K8L based core is Rev H due in H2 2007. Deerhound is now claimed as a K8L part, but given past indications it'll probably be a K8L "light" Yonah type one.
June 3, 2006 4:25:16 AM

Interesting, I suspected that would be the case.
June 3, 2006 4:48:33 AM

Quote:


“Captain, the K8L-plan is an odd and very rare occurrence in the universe, while detectable, it is not tangible. That is to say it is something and nothing at the same time” Data replied.

Picard looked puzzled, “I do not fully understand Data, please explain.”

“The K8L-plan is based upon nothingness but it consists of 50% hope, 40% prayer, 8% intelligent design, and 2% BS. In the present form we see here it is nothing more than a ghost trapped in the vacuum of space, but could potentially mutate into something.”



lol

Ok, perhaps true, but lets be realistic--- doesnt this sound almost exactly like some of Intels old market schemes? Ok, maybe intel has been more like 40% BS and 2 % prayer :D 
June 3, 2006 4:58:41 AM

AMD's full presentation is available here.

http://www.thewalrus.org/amdslides.html

In terms of production, they intend to begin full 65nm production in starting Q4 2007 with product release as previously at the tail end of 2006 and into Q1 2007. Interestingly, Chartered won't transition to 65nm production until mid-2007, so probably won't contribute much to 65nm shipments until late Q3 2007. This should work out rather well since that's when AMD will need the extra wafers to maintain output numbers as they begin shipping quad core Deerhound parts. Until then, Fab 36 will be shouldering the 65nm transition.

AMD seems to be getting really aggressive with their 45nm transition since they want to have it begin production in mid 2008 probably for shipments before the end of that year. With reports that Intel's 45nm process introduction may be pushed back closer to 2008, Intel will only have around a 6 month lead. Probably not as much breathing room as they would have liked.
June 3, 2006 5:08:49 AM

Quote:
Just thought I'd also add for those that are wondering, Rev G is not K8L. It is simply a 65nm die shrink of the K8 Rev F.

http://www.hkepc.com/bbs/itnews.php?tid=608464&starttim...

The first K8L based core is Rev H due in H2 2007. Deerhound is now claimed as a K8L part, but given past indications it'll probably be a K8L "light" Yonah type one.


well at that time Intel would be releasing CPUs at 45nm processes tech. i wonder wot AMD have been doing in the past years... they are completely relying on IBM.. dont they have there own R&D??? anywayz... great competition this year and hopefully in the next.
June 3, 2006 5:09:47 AM

I certainly hope this 45nm transition goes more on schedule than this 65nm debacle. Has anybody acutally seen working 65nm silicon from AMD yet?
June 3, 2006 5:26:42 AM

Im sorry, but didnt Intel do this same approche with their Itanium processors? with the 3 cache levels? And didnt it prove sort of... useless? They decreased the L1 cache? Isnt that he fasted cache?

PFF this isnt going to be much more then an attempt to grab at watever flab they can at intel to pull em back. And it looks like they arnt going to grab a lot. (or have the force to push intel back) but this too is just speculations. Wait and See is my moto.
June 3, 2006 6:07:18 AM

Quote:
With reports that Intel's 45nm process introduction may be pushed back closer to 2008, Intel will only have around a 6 month lead. Probably not as much breathing room as they would have liked.


Roadmaps, deadlines, projections... Often late, sometimes never. I mean, predicting when something will be done for the first time is pretty speculative, doncha think?
June 3, 2006 6:15:03 AM

Quote:
I certainly hope this 45nm transition goes more on schedule than this 65nm debacle. Has anybody acutally seen working 65nm silicon from AMD yet?

Actually, AMD's 65nm ramp is right on schedule and they have executed it flawlessly. In fact, they already demoed working 65nm pc's this past Thursday.
June 3, 2006 6:40:19 AM

Is there a link to that so I can catch up? I'm afraid with the busy week at work that I missed it.
June 3, 2006 4:01:31 PM

K8L just have 32+32KB L1 Cache per core.
how the reduction of L1 cache affects the performance is still unknown.
June 3, 2006 6:42:45 PM

I find this very strange that this news of working 65nm parts did not get more play than it did. I figured everyone would be all over it.
June 3, 2006 7:09:58 PM

Quote:
K8L just have 32+32KB L1 Cache per core.
how the reduction of L1 cache affects the performance is still unknown.

The L1 cache reduction reported by DailyTech is wrong. AMD has confirmed the L1 cache remains at 64KB L1D and 64kB L1I for each core. Only the L2 cache has been cut in half and a L3 cache added.
June 3, 2006 10:45:50 PM

Quote:


“Captain, the K8L-plan is an odd and very rare occurrence in the universe, while detectable, it is not tangible. That is to say it is something and nothing at the same time” Data replied.

Picard looked puzzled, “I do not fully understand Data, please explain.”

“The K8L-plan is based upon nothingness but it consists of 50% hope, 40% prayer, 8% intelligent design, and 2% BS. In the present form we see here it is nothing more than a ghost trapped in the vacuum of space, but could potentially mutate into something.”



lol

Ok, perhaps true, but lets be realistic--- doesnt this sound almost exactly like some of Intels old market schemes? Ok, maybe intel has been more like 40% BS and 2 % prayer :D 

I was just having some fun, writing in a short story with a punch line to compliment Lt_CommanderData for a fine post.

Quote:
Standing up, with his characteristic slight tug of the uniform, Captain Picard turned to Data and said “Well done Lt. Commander Data, well done”. :wink:


If the tables were turned, and Intel was scrambling at this point I would have poked a jab at them as in the same sorta way depending on the situation.

Does anyone recall details that they were going to widen the core in K8L?

Sorry, didnt mean to come off as argumentative, I wasnt trying to be. Both yours and LCDR Datas posts were quite humerous. Its just sad that AMD is degrading to the level of Intel's marketing department and wasting resourses on preemptive advertising, but I guess it had to happen sooner or later.
a b à CPUs
June 3, 2006 11:41:53 PM

aparently everything from intel will use CSI by 2008? perhaps it will be the underdog and beat AMD to a universal bus design, but god dam Intel i think (depending of IF they have something better otherwise) should take on Hypertransport (not designed or owned by AMD) cause then we would see shared chipsets once again, and common features but its not like Intel to do that. :roll:

CSI or HT like designs are like an ace up intels sleve - there yet to use it and i think if AMD did manage to get somethin faster then conroe they will change to it and yet again take the crown.

Quote:
K8L is still a speculation....... 8O


Ahhhh, this is not entirely true. K8L has been on the drawing boards for sometime, AMD has had a 65 nm line running at IBM for a while, so it is very likely it is deep into the development cycle.

AMD does have a very good design team, and it is shaping up to be an interesting race.

Some of the more technical reviewers though are pointing out that many of the "features" appear to be "catching" up to Core 2 -- which is odd because Core 2 is not on the market yet :)  ...

Interestingly, the presentation (more specifically, the lack of timeline) for K8L as well as the other goodies appeared to not have impressed the analysts. Darn hard group to impress...I think it goes back to one argument that I made in that they really just do not understand the technical details of it all... they only understand $.
June 4, 2006 12:14:50 AM

Quote:
“Captain!” exclaimed Lt. Worf.

“Yes, what is it Mr. Worf?”, Captain Picard firmly but softly replied.

“Long-range sensors have detected a strange anomaly straight ahead”, Worf looked mildly stern but not worried as Klingons never worry of pending danger or battle.

Before Picard could announce the next order, William Riker, the handsome bearded bridge officer second in command to the Intelprise chimed in. “Shall I call for a red alert Captain”

“No, number one, not just yet – it appears harmless enough. Lt. Commander Data, could you provide an explanation of what is out there?” Picard asked.

“Certainly Captain”, Data then worked to access the ship’s main computer having recently been equipped with the 802.11n protocol the bandwidth and speed of the query was astonishing, within seconds (an eternity to an android), Data had his answer.

“The strange anomaly detected by the long-range sensors is a K8L-plan” Data explained.

“And what is this K8L-plan Data?” Picard asked, a definite inquisitiveness in his tone.

“Captain, the K8L-plan is an odd and very rare occurrence in the universe, while detectable, it is not tangible. That is to say it is something and nothing at the same time” Data replied.

Picard looked puzzled, “I do not fully understand Data, please explain.”

“The K8L-plan is based upon nothingness but it consists of 50% hope, 40% prayer, 8% intelligent design, and 2% BS. In the present form we see here it is nothing more than a ghost trapped in the vacuum of space, but could potentially mutate into something.”

After a slight pause, Picard responds, “I don’t believe we should take any chances. Mr. Worf, please ready the Core 2 Torpedos.”

With a ever so slight hint of glee, Worf asks, “Shall I arm them with Macro-fusion Captain?”.

“Yes Mr. Worf, please do, we need to be sure.”

“Aye, Sir.” Within moments, Worf declares “The Core 2 is ready Captain”

“Thank you Mr. Worf, fire.”

Within a split second the bridge main view screen turned bright white from the explosion as the Core 2 Torpedeo impacted upon it’s target.

“Captain, the K8L-plan has been destroyed.”

Standing up, with his characteristic slight tug of the uniform, Captain Picard turned to Data and said “Well done Lt. Commander Data, well done”. :wink:

Seriously, nice post.


bwhhahahahhahahahahhahahah
June 4, 2006 12:57:51 AM

Quote:
“Captain!” exclaimed Lt. Worf.

“Yes, what is it Mr. Worf?”, Captain Picard firmly but softly replied.

“Long-range sensors have detected a strange anomaly straight ahead”, Worf looked mildly stern but not worried as Klingons never worry of pending danger or battle.

Before Picard could announce the next order, William Riker, the handsome bearded bridge officer second in command to the Intelprise chimed in. “Shall I call for a red alert Captain”

“No, number one, not just yet – it appears harmless enough. Lt. Commander Data, could you provide an explanation of what is out there?” Picard asked.

“Certainly Captain”, Data then worked to access the ship’s main computer having recently been equipped with the 802.11n protocol the bandwidth and speed of the query was astonishing, within seconds (an eternity to an android), Data had his answer.

“The strange anomaly detected by the long-range sensors is a K8L-plan” Data explained.

“And what is this K8L-plan Data?” Picard asked, a definite inquisitiveness in his tone.

“Captain, the K8L-plan is an odd and very rare occurrence in the universe, while detectable, it is not tangible. That is to say it is something and nothing at the same time” Data replied.

Picard looked puzzled, “I do not fully understand Data, please explain.”

“The K8L-plan is based upon nothingness but it consists of 50% hope, 40% prayer, 8% intelligent design, and 2% BS. In the present form we see here it is nothing more than a ghost trapped in the vacuum of space, but could potentially mutate into something.”

After a slight pause, Picard responds, “I don’t believe we should take any chances. Mr. Worf, please ready the Core 2 Torpedos.”

With a ever so slight hint of glee, Worf asks, “Shall I arm them with Macro-fusion Captain?”.

“Yes Mr. Worf, please do, we need to be sure.”

“Aye, Sir.” Within moments, Worf declares “The Core 2 is ready Captain”

“Thank you Mr. Worf, fire.”

Within a split second the bridge main view screen turned bright white from the explosion as the Core 2 Torpedeo impacted upon it’s target.

“Captain, the K8L-plan has been destroyed.”

Standing up, with his characteristic slight tug of the uniform, Captain Picard turned to Data and said “Well done Lt. Commander Data, well done”. :wink:

Seriously, nice post.



That is some funny stuff. :) 
June 4, 2006 1:02:49 AM

Jack get a Display image, It'll be easyer to find you Plz! and your reacting exactly like what an AMD Fan was acting when the Conroe was just in the research labs of Intel and only One Intel Engineering sample about to be tested against the Overclocked FX-60. Lols when K8L comes and and it's as good or better than whar the charts show/ You'l jump the Core2DUO wagon and be hanging by a windsheildwiper to the AMD wagon again this 65nm-45nm-32nm is really getting interesting and L3 cache is'nt bad at arousing my ears either
June 4, 2006 2:10:22 AM

Quote:
AMD's full presentation is available here.

http://www.thewalrus.org/amdslides.html

In terms of production, they intend to begin full 65nm production in starting Q4 2007 with product release as previously at the tail end of 2006 and into Q1 2007. Interestingly, Chartered won't transition to 65nm production until mid-2007, so probably won't contribute much to 65nm shipments until late Q3 2007. This should work out rather well since that's when AMD will need the extra wafers to maintain output numbers as they begin shipping quad core Deerhound parts. Until then, Fab 36 will be shouldering the 65nm transition.

AMD seems to be getting really aggressive with their 45nm transition since they want to have it begin production in mid 2008 probably for shipments before the end of that year. With reports that Intel's 45nm process introduction may be pushed back closer to 2008, Intel will only have around a 6 month lead. Probably not as much breathing room as they would have liked.


Interestingly, french Soitec (creators of the Smart Cut process), which has firmed a contract with AMD for 2006 (going from the previous 2005 $50M to more than the triple, >$150M) on wafer supplying in both 200mm & 300mm, is hardly mentioned in any references concerning AMD's partners for existing/near-future manufacturing process transition:
Quote:
Under the terms of the deal Soitec is set to supply AMD with both 200-mm and 300-mm diameter SOI wafers, manufactured using the Smart Cut process. Soitec has been supplying AMD with volume quantities of thin-film Unibond SOI wafers for the production of microprocessors, since at least 2001.
(http://www.eetimes.com/showArticle.jhtml?articleID=177100550)
Apparently, any delays in AMD's next-gen manufacturing can hardly be attributed to the lack of SOI wafer stock & dicing, delays which can be, most probably, related to Fab adaptations & equipment...
Actually, Soitec's CTO is also a member of the Innovative Silicon start-up board of directors (http://www.eetimes.com/news/design/showArticle.jhtml?articleID=187200741), a Swiss/US company responsible for the Z-RAM buzz...
According to the company,
Quote:
The creation of SOI (Silicon-On-Insulator) material—Soitec’s primary business—represents an intermediate step between the fabrication of the polished, bulk wafers and the creation of electronic components. The role of SOI is to electronically insulate a fine layer of the monocrystalline silicon from the rest of the silicon wafer.

Semiconductor manufacturers can then fabricate integrated circuits (ICs or chips) on the top layer of the SOI wafers using the same processes they would use on plain silicon wafers. As always, the wafers are then cut up and the chips packaged (...) Soitec pioneered a viable solution that would allow chipmakers to capitalize on these advantages [SOI is better than bulk] without investing in additional process equipment.

Speculating, this might contribute for a progressively faster 65nm/300mm transition, since parts of the manufacturing process are outsourced, and supporting both AMD's claims that they'll achieve the transition faster than expected and, simultaneously, their silence...

Soitec: http://www.soitec.com/en/products/p_1.htm

Just a thought.


Cheers!
June 4, 2006 2:14:35 AM

Qapla!
June 4, 2006 7:02:13 PM

Quote:
“Captain!” exclaimed Lt. Worf.


:lol: 
You've certainly got a way with stories & humour... so, if you've already planted a tree...

Well, not a fan of anything but... seems Intelprise was merely loaded with (really hot!) "HyperThreaded NetBurst" torpedoes, at the time (the new Core 2 upgrades were being demoed at a remote deck, to a bunch of Gremlins...) :lol: 


Cheers!
June 4, 2006 10:52:54 PM

I'd imagine 3 issue, it would have been mentioned by now if it was 4 issue.
June 4, 2006 11:48:46 PM

Quote:
I'd imagine 3 issue, it would have been mentioned by now if it was 4 issue.


I thought so.... thanks, Jack



AMD might surprise us, or they may not.

We shall see :-D

Live long and prosper!
June 5, 2006 1:10:43 AM

Quote:
In terms of K8L -- do you have any info if they widened the core? Is it going to be 3-issue or 4? Some rumors have been floating, but I do not recall any specific info.

Jack


Actually no, not yet. I think Action_Man's reasoning is... well, reasonable but, that's as far as it goes, for now.

(Now, if I was Dirk Meyer until 2H 2007... :wink:) 


Cheers!
June 5, 2006 1:30:08 AM

Well I could also add that it hasn't been widened so it would be somewhat pointless.
June 5, 2006 1:45:13 AM

(I'm sorry, this is so off-topic, but I have to say it...)
WHAT???
Action Man! Why did you change your avatar?
First I saw your sig, then your nick, and.... O_O Your avatar??? Huh??
I like the old one...

Don't know if anyone has already noticed it, I just got in... :p 
June 5, 2006 1:50:49 AM

Quote:
(I'm sorry, this is so off-topic, but I have to say it...)
WHAT???
Action Man! Why did you change your avatar?
First I saw your sig, then your nick, and.... O_O Your avatar??? Huh??
I like the old one...

Don't know if anyone has already noticed it, I just got in... :p 




That's blasphemy!!!!

Blasphemy I say!!!!

Green is AMD's color :lol:  :lol: 
June 5, 2006 2:06:42 AM

Quote:
I'd imagine 3 issue, it would have been mentioned by now if it was 4 issue.


I thought so.... thanks, Jack



AMD might surprise us, or they may not.

We shall see :-D

Live long and prosper!

Yeah, it could be one of those secret things they do not want to disclose at the moment -- that would be wise.

jack



:-D

They have been ultra-secretive lately, which seems to indicate they are planning something.
June 5, 2006 2:12:49 AM

Well, there are a few of us who are waiting... the AMD stockholders, the enthusiasts, and myself! :lol: 
June 5, 2006 2:15:22 AM

Quote:
Well I could also add that it hasn't been widened so it would be somewhat pointless.


That's not fair; AMD would have to prove it first for you to prove it next.


Cheers!
June 5, 2006 2:40:50 AM

Quote:
Yeah, it could be one of those secret things they do not want to disclose at the moment -- that would be wise.


Maybe they are about to divest?
June 5, 2006 2:46:03 AM

Quote:
Yeah, it could be one of those secret things they do not want to disclose at the moment -- that would be wise.


Maybe they are about to divest?



Or more likely make a major purchase... ATI or nVidia perhaps????


:-D
June 5, 2006 3:00:33 AM

Quote:
In terms of K8L -- do you have any info if they widened the core? Is it going to be 3-issue or 4? Some rumors have been floating, but I do not recall any specific info.

The instruction decode width has been increased from 16B or 128 bits to 32B or 256bits, which indicates that something is going on with the decoders. Core's instruction width has widened to 160bits+ to accomodate the 4 decoders + 1 for macro-ops fusion. Personally, I'm leaning on higher than 160bits in order to mantain the same ratio of width to decoders. Something like 24B or 192bits is probably sensible, although I haven't heard anything more on this subject. Some people were pointing to the doubled instruction decode width as indicative of a doubled 6-issue core, but they appear to be a little enthousiastic to say the least. Certainly, K8L has no where near the execution units to satisfy such a width. A 4-issue width plus some type of fusion, in other words an approach similar to Intel's is more likely.
June 5, 2006 3:13:25 AM

Quote:
In terms of K8L -- do you have any info if they widened the core? Is it going to be 3-issue or 4? Some rumors have been floating, but I do not recall any specific info.

The instruction decode width has been increased from 16B or 128 bits to 32B or 256bits, which indicates that something is going on with the decoders. Core's instruction width has widened to 160bits+ to accomodate the 4 decoders + 1 for macro-ops fusion. Personally, I'm leaning on higher than 160bits in order to mantain the same ratio of width to decoders. Something like 24B or 192bits is probably sensible, although I haven't heard anything more on this subject. Some people were pointing to the doubled instruction decode width as indicative of a doubled 6-issue core, but they appear to be a little enthousiastic to say the least. Certainly, K8L has no where near the execution units to satisfy such a width. A 4-issue width plus some type of fusion, in other words an approach similar to Intel's is more likely.




Hmm.... interesting.... very interesting....

Do you have any more intel? :-D

No, not that Intel :lol: 
June 5, 2006 3:25:56 AM

To be fair, K8 incorporated fusion techniques from the start, it's just that Yonah's micro-ops fusion is more advanced. I always wondered why AMD never complained or tried to play up their own fusion abilities.
June 5, 2006 3:56:11 AM

Emm. I think I messed this up. I said "doubled instruction decode width" when I should have said "doubled instruction fetch width" which leads to the decoders. I think that should clarify things.

A double decode operation would actually be pretty interesting, but would be complicated since the likelihood of 2 instructions being able to be decoded in a single decoder at the same time is unlikely without proper fusion techniques. However, since you pointed this out, a K8L having massive macro-ops fusion techniques, ie a wider range than Core, would likely explain the extremely large instruction fetch.
!