Interesting rumour for AM2 and inverse threading

[K8MAN]

http://www.xtremesystems.org/forums/showthread.php?t=103636

This isnt official but the general consensus is that it is true and there is some kind of virtualization built into AM2 chips that just needs a BIOS update so activate and it's coming after Conroe. Would be very interesting if this was true.
Discuss

 

[RichPLS]

Indeed it would be something if true...
But link indicated this info comes from a well know Russian site which spreads FUD... :roll:

 

[K8MAN]

Maybe the single virtual core will have the hyperthreading trick that AMD gave the original X2 line so that HT optimized apps would run well on X2 so when there are more threads than one It splits the load up again into 2(or more) threads. It may seem silly but i dont think they can have the OS switch between 1 and 2 core mode on the fly. Who know's though I guess we'll have to wait for answers.

 

[spud]

Maybe the single virtual core will have the hyperthreading trick that AMD gave the original X2 line so that HT optimized apps would run well on X2 so when there are more threads than one It splits the load up again into 2(or more) threads. It may seem silly but i dont think they can have the OS switch between 1 and 2 core mode on the fly. Who know's though I guess we'll have to wait for answers.

Problem is it isn’t going to be a virtual core, which is the underlying principal of Hyper Threading. Also AMD X2 core set up, accesses XP's 2 physical core code base not XP's Hyper Threading code base or XP's single core code base.

As per the OS switching from 1 to 2 threads on the fly is very much impossible at this point, future OS development might bring something like that to light but I highly doubt it since the compiler makes the final say on threads.

As far as I am concerned at this point AMD is blowing more white smoke to pawn off something that the OS manages anyways. Why take 1 thread spit it into 2 and work on it at the same time, oh wait that is already being done on current dual core, HT, and dual processor environments. They are pulling more crap to undermine the Core 2 Duo launch, the only problem is the fundamental technology they are trying to pawn off as new already exists and has been around for quite some time.

 

[zarooch]

Maybe the single virtual core will have the hyperthreading trick that AMD gave the original X2 line so that HT optimized apps would run well on X2 so when there are more threads than one It splits the load up again into 2(or more) threads. It may seem silly but i dont think they can have the OS switch between 1 and 2 core mode on the fly. Who know's though I guess we'll have to wait for answers.

Problem is it isn’t going to be a virtual core, which is the underlying principal of Hyper Threading. Also AMD X2 core set up, accesses XP's 2 physical core code base not XP's Hyper Threading code base or XP's single core code base.

As per the OS switching from 1 to 2 threads on the fly is very much impossible at this point, future OS development might bring something like that to light but I highly doubt it since the compiler makes the final say on threads.

As far as I am concerned at this point AMD is blowing more white smoke to pawn off something that the OS manages anyways. Why take 1 thread spit it into 2 and work on it at the same time, oh wait that is already being done on current dual core, HT, and dual processor environments. They are pulling more crap to undermine the Core 2 Duo launch, the only problem is the fundamental technology they are trying to pawn off as new already exists and has been around for quite some time.

Word.

 

[K8MAN]

As far as I am concerned at this point AMD is blowing more white smoke to pawn off something that the OS manages anyways. Why take 1 thread spit it into 2 and work on it at the same time, oh wait that is already being done on current dual core, HT, and dual processor environments. They are pulling more crap to undermine the Core 2 Duo launch, the only problem is the fundamental technology they are trying to pawn off as new already exists and has been around for quite some time.

Wonder where they would ever get that idea :roll:
Oh and btw AMD isnt touting this. It's a secret.

 

[Ycon]

They are just trying to pull software engineers back into programming single-threaded software but it wont work.

Maybe AMD supports an anti-technological-progress view? :lol:

 

[dvdpiddy]

They are just trying to pull software engineers back into programming single-threaded software but it wont work.

Maybe AMD supports an anti-technological-progress view? :lol:

Maybe if you were'nt so bias. You know what Ycon nevermind there's no point in argueing with an intel fanboy of your calibur you've been brainwashed beyond belief even the mention of a company that is a rival to intel and the only thought's that come into your brain are Not...intel...bad...must...say...bad things! Geez dude stop trashing amd at every turn they had their turn in the spotlight and now intel's got their's. Do i trash conroe all the time? No! Cause i know it's gonna be good what if amd pull's out a rabbit from their ass like they did with k8? And let's say that this new architecture has a 10% performance increase over conroe? What would you do then huh? Would you still trash amd knowing that they are better or would you admit defeat and get along with the rest of us here?

 

[K8MAN]

They are just trying to pull software engineers back into programming single-threaded software but it wont work.

Maybe AMD supports an anti-technological-progress view? :lol:

It's an inovation that could unify the quest for parrallelism with the quest for single threaded performance. Whats wrong with that? If it's working already then all they need to do is add more core's and then devise a system to keep those cores fed. It would be like the string theory of the CPU world where everything is based off of a simple design which can be infinitly expanded.

 

[Artmic]

I trully doubt AMD would release this "technology" this year, (IF EVER) lol

From a development standpoint i think it sucks, i dont' want 2 cpu's to act as one, please no more SLI wet dreams lol

I want to work on numerous software applications at the same time, all this gives you is a SLI based dual CORE cpu, which time slices the threads/proccesses running on it no doubt :lol:

So yeah it would be fast, but it wouldn't solve problems with 12 intensive apps running at the same time, and one behaving like a pig and hogging CPU time.

 

[spud]

They are just trying to pull software engineers back into programming single-threaded software but it wont work.

Maybe AMD supports an anti-technological-progress view? :lol:

It's an inovation that could unify the quest for parrallelism with the quest for single threaded performance. Whats wrong with that? If it's working already then all they need to do is add more core's and then devise a system to keep those cores fed. It would be like the string theory of the CPU world where everything is based off of a simple design which can be infinitly expanded.

The quest for parallism has already come and gone, modern day compilers do a fantastic job of it already. As well current implementations of SPARC, MIPS, Cell, Itanium or anything RISC does a fantastic job at parallel execution. But that’s a single die execution environment, changing the page to dual core or higher adds significant code complexity roughly every core would add 125% more coding/debug time as well with the current limitations imposed by x86 machines; shifting, page access, memory allocation, branching, looping, pointer limitations, register renaming, instruction order limitations, vectorizeing limitations, stack size limitations, memory segmentation limits, array sizes, and the lack there of 32bit and 64bit registers. Hinder that progress of efficient code execution.

As per single threaded performance we are starting to see the single thread performance slowing and normalizing, while dual and quad have promising thread performance, much of that that performance will be from the code base and compiler used. This currently looks to be already established in key development and media apps, but won’t likely ever make its way into the general computing environments as some would hope. Unless the software industry decided to have a performance war, which isn’t going to happen, because KISS rules all.

But that’s not saying GCC or ICC compilers couldn’t create the binary for such adventitious endeavors. But even with the compilers and decent coding you will still need a very robust hardware configuration.

Oh and the String theory doesn’t work since we are all running OOO machines.

 

[Action_Man]

You can tell its fake once they mention that MS will release a patch for it.

 

[The_Abyss]

They are just trying to pull software engineers back into programming single-threaded software but it wont work.

Maybe AMD supports an anti-technological-progress view? :lol:

Maybe if you were'nt so bias. You know what Ycon nevermind there's no point in argueing with an intel fanboy of your calibur you've been brainwashed beyond belief even the mention of a company that is a rival to intel and the only thought's that come into your brain are Not...intel...bad...must...say...bad things! Geez dude stop trashing amd at every turn they had their turn in the spotlight and now intel's got their's. Do i trash conroe all the time? No! Cause i know it's gonna be good what if amd pull's out a rabbit from their ass like they did with k8? And let's say that this new architecture has a 10% performance increase over conroe? What would you do then huh? Would you still trash amd knowing that they are better or would you admit defeat and get along with the rest of us here?

Splinter. Plank. Eye.

Add some extra words and the concept should become clear.

 

[K8MAN]

They are just trying to pull software engineers back into programming single-threaded software but it wont work.

Maybe AMD supports an anti-technological-progress view? :lol:

It's an inovation that could unify the quest for parrallelism with the quest for single threaded performance. Whats wrong with that? If it's working already then all they need to do is add more core's and then devise a system to keep those cores fed. It would be like the string theory of the CPU world where everything is based off of a simple design which can be infinitly expanded.

The quest for parallism has already come and gone, modern day compilers do a fantastic job of it already. As well current implementations of SPARC, MIPS, Cell, Itanium or anything RISC does a fantastic job at parallel execution. But that’s a single die execution environment, changing the page to dual core or higher adds significant code complexity roughly every core would add 125% more coding/debug time as well with the current limitations imposed by x86 machines; shifting, page access, memory allocation, branching, looping, pointer limitations, register renaming, instruction order limitations, vectorizeing limitations, stack size limitations, memory segmentation limits, array sizes, and the lack there of 32bit and 64bit registers. Hinder that progress of efficient code execution.

As per single threaded performance we are starting to see the single thread performance slowing and normalizing, while dual and quad have promising thread performance, much of that that performance will be from the code base and compiler used. This currently looks to be already established in key development and media apps, but won’t likely ever make its way into the general computing environments as some would hope. Unless the software industry decided to have a performance war, which isn’t going to happen, because KISS rules all.

But that’s not saying GCC or ICC compilers couldn’t create the binary for such adventitious endeavors. But even with the compilers and decent coding you will still need a very robust hardware configuration.

Oh and the String theory doesn’t work since we are all running OOO machines.
Once again AMD has been working on this since K8 first hit market so they've had alot of time and probably have a lot invested into this tech. My string theory comment was put there for comparitive vision.

 

[shinigamiX]

They are just trying to pull software engineers back into programming single-threaded software but it wont work.

Maybe AMD supports an anti-technological-progress view? :lol:

It's an inovation that could unify the quest for parrallelism with the quest for single threaded performance. Whats wrong with that? If it's working already then all they need to do is add more core's and then devise a system to keep those cores fed. It would be like the string theory of the CPU world where everything is based off of a simple design which can be infinitly expanded.

The quest for parallism has already come and gone, modern day compilers do a fantastic job of it already. As well current implementations of SPARC, MIPS, Cell, Itanium or anything RISC does a fantastic job at parallel execution. But that’s a single die execution environment, changing the page to dual core or higher adds significant code complexity roughly every core would add 125% more coding/debug time as well with the current limitations imposed by x86 machines; shifting, page access, memory allocation, branching, looping, pointer limitations, register renaming, instruction order limitations, vectorizeing limitations, stack size limitations, memory segmentation limits, array sizes, and the lack there of 32bit and 64bit registers. Hinder that progress of efficient code execution.

As per single threaded performance we are starting to see the single thread performance slowing and normalizing, while dual and quad have promising thread performance, much of that that performance will be from the code base and compiler used. This currently looks to be already established in key development and media apps, but won’t likely ever make its way into the general computing environments as some would hope. Unless the software industry decided to have a performance war, which isn’t going to happen, because KISS rules all.

But that’s not saying GCC or ICC compilers couldn’t create the binary for such adventitious endeavors. But even with the compilers and decent coding you will still need a very robust hardware configuration.

Oh and the String theory doesn’t work since we are all running OOO machines.
What?

 

[apache_lives]

they seem to be copying everythin intel latly (good and bad), another?

http://www.xtremesystems.org/forums/showthread.php?t=103636

This isnt official but the general consensus is that it is true and there is some kind of virtualization built into AM2 chips that just needs a BIOS update so activate and it's coming after Conroe. Would be very interesting if this was true.
Discuss

 

[elbert]

You can tell its fake once they mention that MS will release a patch for it.

Its not a fake as I found links to AMD's CEO speaking of using the FPU's as early as dual core K8L back in the very large conroe vs FX60 thread. MMM looked at my sites and found Revearse HyperThreading would later use the entire CPU. Its true that K8L wont be seeing the entire Revearse HyperThreading but FPU's extensions could make a big differance any case.

What effects this will have in a multi threaded program is balancing the load to combat Intels HT load balancing. AMD will have a clear advantage at older games and single threaded programs.

 

[BaronMatrix]

http://www.xtremesystems.org/forums/showthread.php?t=103636

This isnt official but the general consensus is that it is true and there is some kind of virtualization built into AM2 chips that just needs a BIOS update so activate and it's coming after Conroe. Would be very interesting if this was true.
Discuss

Translated:

AMD will let out "anti- -.Hyper-Threading" in this year: the secret weapon Socket AM2

Even during April of this year appeared rumors about the fact that company AMD develops the technology, reverse on its action of the known technology Hyper-Threading from Intel. Let us recall that the latter makes possible for one processor to substitute by itself two virtual nuclei, and to divide between themselves the flows of data. Intel forewent further development of "virtual mnogoyadernosti" in favor of real mnogoyadernosti, but it does not exclude the possibility of the revival of this technology in the new performance.

According to our personal information, obtained from the familiar with plans AMD of sources, already in this year the company will open access to technology, reverse on its action Hyper-Threading. If the latter divides the resources of one physical processor nucleus, then know-how AMD will make it possible to unite the resources of two physical nuclei for accelerating the tasks, which optimally work on the mononuclear processors. For example, this will make it possible to double a quantity of decoders, and the "united" processor will carry out six instructions for time. This already by itself can become not bad answer to the output of processors Conroe, and the debut of the corresponding technology for sure takes place on the eve on 24 July.

The corresponding functionality is already build it the binuclear processors Athlon 64 x2 in execution Socket AM2. For its activation it will be required to only renew the driver of processor and BASIC INPUT-OUTPUT SYSTEM of maternal pay. Company Microsoft must let out appropriate patch for the operating systems, which will make it possible to receive two nuclei Athlon 64 X2 as one. By the way, according to the preliminary data, processor will be able to be switched into the "united" regime dynamically, depending on the type of the utilized application. It is no secret that many tasks as before win from the use of productive mononuclear processors, while not working at the lower frequencies binuclear processors.

It is amusing, which itself AMD will be simultaneously occupied by the popularization of platform 4x4, calculated for the enthusiasts, thinkers of its existence without mnogozadachnosti. Judging by everything, two sufficient different approach will be spread on the different market niches. In any case, the possibility "to unite" two nuclei into one virtual will manage to the possessors of processors Athlon 64 x2 in execution Socket AM2 absolutely free of charge, if we do not consider possible expenditures for running off new BASIC INPUT-OUTPUT SYSTEM driver for the operating system.

It is no secret that the start of technology Hyper-Threading sometimes caused reduction in the productivity, since two virtual nuclei began to dispute with the attempt to determine the priority of processing the flows of data. It is possible to assume that the antipode of technology Hyper-Threading from AMD will make it possible to avoid such annoying conflicts, and even will increase the operating speed of system.

In proportion to the appearance of new information about this know-how AMD we will acquaint you with it on the pages of our site.

If this is true, it will be a serious blow to Core 2. Imagine what 2 4200+ AM2s could do in SuperPi, much less 2 FX62s. 4x4 would be necesary i this case to keep 2 threads for the coming games for maximum scalability, but if the arbiter for the XBar is ready it would be a good 10-25% increase on single threaded apps.

Looking at it fromthat perspective, the X2 could present itself as one contiguous core with block allocation for serialized tasks. Rather than depending on affinity it could depend on load per core. Since X2 uses HT to refresh the cache - recent post from JJ or such - coherency would be less of a problem and each core could work from L2. Of course the would need t be an efficient method for retiring data from each cache but marking the memory using something similar to "data-poisoning" where instead of not executing it causes a cache flush. It actually sounds like the way .Net handles memory but I digress.

All in all, if it can actually combine execution between two cores with even 40% efficiency (above standard AM2 IPC), that would erase any advantage Core 2 has now in any single threaded apps. Imagine this in an Opteron F.

I don't know if Intel wants to wait two years before updating.

 

[shinigamiX]

Imagine how much two FX-62s or two 4200s would cost.
Also keep in mind that Core 2 is in its infancy. It can only get better. But you make valid points.

 

[BaronMatrix]

Imagine how much two FX-62s or two 4200s would cost.
Also keep in mind that Core 2 is in its infancy. It can only get better. But you make valid points.

If you look at the article, it says this will happen at the same time the A64/X2 price cuts happen and it's a Rev F function, so I could have said 2 3800+s. If it gives 140% of current single thread perf at clock, it's awesome especially if it unlocks more DDR2 bandwidth.

 

[BaronMatrix]

And also I remembered that dual core is recognized by the Task Mgr as 100% CPU where 50% is one core. Imagine then a quad core K8L with this ability. 8O

 

[joset]

They are just trying to pull software engineers back into programming single-threaded software but it wont work.

Maybe AMD supports an anti-technological-progress view? :lol:

It's an inovation that could unify the quest for parrallelism with the quest for single threaded performance. Whats wrong with that? If it's working already then all they need to do is add more core's and then devise a system to keep those cores fed. It would be like the string theory of the CPU world where everything is based off of a simple design which can be infinitly expanded.

The quest for parallism has already come and gone, modern day compilers do a fantastic job of it already. As well current implementations of SPARC, MIPS, Cell, Itanium or anything RISC does a fantastic job at parallel execution. But that’s a single die execution environment, changing the page to dual core or higher adds significant code complexity roughly every core would add 125% more coding/debug time as well with the current limitations imposed by x86 machines; shifting, page access, memory allocation, branching, looping, pointer limitations, register renaming, instruction order limitations, vectorizeing limitations, stack size limitations, memory segmentation limits, array sizes, and the lack there of 32bit and 64bit registers. Hinder that progress of efficient code execution.

As per single threaded performance we are starting to see the single thread performance slowing and normalizing, while dual and quad have promising thread performance, much of that that performance will be from the code base and compiler used. This currently looks to be already established in key development and media apps, but won’t likely ever make its way into the general computing environments as some would hope. Unless the software industry decided to have a performance war, which isn’t going to happen, because KISS rules all.

But that’s not saying GCC or ICC compilers couldn’t create the binary for such adventitious endeavors. But even with the compilers and decent coding you will still need a very robust hardware configuration.

Oh and the String theory doesn’t work since we are all running OOO machines.

Well, I'm not supposed to understand it all; wonderful post, anyway.
A second run of this "old" one http://forumz.tomshardware.com/hardware/modules.php?name=Forums&file=viewtopic&p=1087868#1087868, so it seems.

Oh, and String Theory would work; it's also supposed to explain OoO on a lower level, that is.


Cheers!

 

[symbi0nt]

If this turns out to be true...
would a conroe still be the #1 choice of cpu compared with a variety of other amd chips?

 

[K8MAN]

If this turns out to be true...
would a conroe still be the #1 choice of cpu compared with a variety of other amd chips?

Depends on the performance of AMD's solution I guess.

 

[Heyyou27]

You're a fool, both companies have made fantastic products.