Life After Conroe

[ltcommander_data]

http://www.dailytech.com/article.aspx?newsid=2649

There's some fascinating stuff in there including that Penryn does seem scheduled for 2007, not a 2008 delay. They also detail some of the features of Intel's next processes including P1266 45nm and P1268 32nm.

I think the biggy is that while NGMA consolidated the mobile, desktop, and server markets into one core design, Nehalem seems to be moving all three markets to the same processor. I'm not clear of the details of how that is supposed to work since it's not very "Intel" and kind of kills product differentiation. Either the marketing department is going to take a hit or it'll be working overtime to help the customer figure this out. No mention of CSI, but I'd think that'd be a crucial part of it.

 

[Dante_Jose_Cuervo]

Interesting. It's odd that they'd be changing so often. It's like you'll be spending craploads of money just to keep up, which is actually pretty close to what people are doing today but with this new change it'll be accelerated. I mean just look at AMD's current architecture, how long has it been around? I think what Intel should do is slow down their roadmap and just work with each generation long to tweek it to its max potential. But alas, this is only my opinion.

 

[Action_Man]

Isn't the only difference between conroe, woodcrest and merom just fsb and clock speeds?

 

[Dante_Jose_Cuervo]

Interesting. It's odd that they'd be changing so often. It's like you'll be spending craploads of money just to keep up, which is actually pretty close to what people are doing today but with this new change it'll be accelerated. I mean just look at AMD's current architecture, how long has it been around? I think what Intel should do is slow down their roadmap and just work with each generation long to tweek it to its max potential. But alas, this is only my opinion.

 

[ltcommander_data]

Well, the prefetchers are optimized differently, the aggressiveness of the power savings features is probably different, and I'd expect there to be other microcode changes. The big difference is really the sockets so it's probably that Intel is looking at a common socket design. I'd expect the optimizations above to still apply, but they might allow you to drop a mobile chip in a server if you are looking for the lowest power consumption. I wonder if Intel will allow mobile chips to support multi-socket configurations though.

 

[Action_Man]

Well, the prefetchers are optimized differently

How so?

the aggressiveness of the power savings features is probably different

Unlikely.

Not really much of a difference in sockets, well between server and desktop. Merom doesn't need socket T for a number of reasons and the current sock its using is cheaper.

 

[ltcommander_data]

How so?

Ah. I finally found the reference. It's always nice to know that you're not imagining things.

http://www.tomshardware.com/2006/03/13/idf_spring_2006/page8.html

Each Core dual-core processor comes with a total of eight prefetcher units: two data and one instruction prefetcher per core and two prefetchers as part of the shared L2 cache. Intel says they can be fine-tuned for each of the Core processor models (Merom/Conroe/Woodcrest) in order to prefetch data differently, whether it is for mobile-, desktop- or server-class usage models.

Prefetching is done by predicting using data access patterns so it'd make sense that the patterns would be slightly different in each segment so that things can be optimized differently.

 

[Action_Man]

Shame they provided so little info on it.

 

[the_vorlon]

There are differences between meron, conroe, woodcrest, etc... but they are quite small.

Xeons (Woodcrest) for example have ECC support in the L1 and L2 cache. The die is the same for Meron and Conroe, but they just don't turn it on.

Meron likely was the wafer composition tweeked for low power.

Depending on subtue changes in the doping of the silicon you can get higher clockspeed and/or lower power consumption, but typically at the expense of yields.

 

[archibael]

Some of this is right, some of this is wrong, but even on the stuff that is right, Dailytech seems to think they are providing fascinating new insight, when this is stuff that's been going on for years.

# Intel will unify its processor architectures -- no more Merom/Conroe/Woodcrest derivatives. The processor core that you use in your server will essentially be the same chip you use in your notebook.

Only been going on since Coppermine. Earlier than that, if you want to get technical about it.

# Parallel design -- The Nehalem team is already working on its 45nm processor. Penryn is a "meet you in the middle" project between Core and Nehalem, which is also undergoing development. The same leapfrogging will occur with Nehalem and Gesher.

Has always been going on, productwise. The acceleration of architectures is new, though.

# P1266, Penryn, and chips afterwards will use radically different manufacturing techniques -- High-k dielectrics, metal gate electrodes and with Nehalem-C a switch from 193nm DUV lithography to EUV 13.4nm lithography.

Quite probably accurate, and the most useful data provided.

(sorry, had to delurk for that... don't believe everything you read... product differentiation isn't going away)

 

[Action_Man]

If a feature isnt turn on its still the same.

 

[theaxemaster]

I miss my coppermine....

 

[the_vorlon]

If a feature isnt turn on its still the same.

as I said, the die is the same...

 

[1Tanker]

I find it interesting that they mentioned carbon nano-tubes being considered as early as 2013. From what i understood, they were 15-20 years away. :?

 

[K8MAN]

There are a few different ways to share the same CPU and still differentiate the product, AMD does this all to well. Intel has shown that it too can include small circuit blocks and selectively turn it on or off depending on the feature set it wants to include. (EE's with HT and unlocked multi's). Also, in servers where performance and reliability are king, special process targetting may shift you to those high end parts (sacrificing yield for example, but make up in margin).

There is also some benefit in bringing rapid change to products within the market. I can recall in the late 90's where Intel was pounding the market is segmenting drum. As such they attempted to segment their processors (Itanium, P4c, mobile P3 and their evolutions). AMD took a different approach, design a kick-A processor for server and filter the desgin down to fit within segments, it fit DT good but mobile horrid.

Interestingly the philosophies seem to be swapping for the most part... Intel unifying their design and AMD segmenting it (i.e. Bulldozer -- specific mobile part, K8L rocked directly to server, and K8 whatever to get variants of K8L plans are vague here).

Nonetheless, good post.

Not to go too far off topic but I think AMD's new approach is much more efficient then Intel's crusade of the past 5 years. All of AMD's new chips will be designed around a core which was engineered from the start to be modular with cache, core's, and soon co-procs. Their main advantage here is HTT which allows them to build CPU's and add/subtract things in very little time with a common link and I can only see their architecture benifiting them in the future.