Just my 0.02:
I believe that all that "low latency" and "higher bandwidth" of integrated memory controller has a lot to do with a quality of K7 3rd party chipsets, which were notoriously known for low(er) memory perfomance that Intel chipsets for Pentiums.
Therefore integrating memory controller on die brought all that nice performance improvements for K8. That is IMHO the real source of this "memory starved" legend. (Meanwhile, P4 Netburst sucks regardless of memory latency.)
Not to discount all of what is said here, but, didn't nVidia - a 3rd party chipset maker - pioneer the dual-channel DDR technology? Wasn't it the nForce2 chipset that first had this technology, now seen in
all chipsets (excluding some budget systems)? I agree that
most of AMD's 3rd party chipset makers were not up to the standards of Intel, but I think some (nVidia specifically) exceed them.
I believe the reason the on-die memory controller created such a leap in performance was that the CPU no longer had to address the Northbridge in order to access the memory. To use a metaphore - imagine if every time you wanted to speak to somebody, for any reason, you had to go through a 3rd party. You give them the message, they give it to your friend/family/pizza delivery guy, who then gives the response to the 3rd party, who then comes and gives the response to you. Just think about how much less efficient that is than just talking to them yourself. That, in a very lay-nutshell, is why ODMC is more efficient than a Northbridge.