Sign in with
Sign up | Sign in
Your question

Reverse hyper threading and intel.

Tags:
  • CPUs
  • Intel
  • License
  • AMD
Last response: in CPUs
Share
June 24, 2006 7:18:19 PM

So does anyone know if intel is going to be using their own version of reverse hyper threading for conroe or did amd patent it and not license the tech to anyone.

More about : reverse hyper threading intel

June 24, 2006 7:19:44 PM

Intel Multi-Plexing... Enabled...
June 24, 2006 7:27:14 PM

Thnak you so basically it's the same as reverse hyper threading right?
Related resources
June 24, 2006 7:33:45 PM

Quote:
Thnak you so basically it's the same as reverse hyper threading right?

no, "rht" is not implemented and we don't know if it can be
June 24, 2006 7:37:25 PM

OK thnaks for the quick answers guys.
June 24, 2006 7:59:04 PM

Thank you. So amd is still screwed with conroe cause of this core multi-plexing.
June 24, 2006 8:05:00 PM

Thank you jack you are one of the smartest people here.
June 24, 2006 8:08:11 PM

Quote:
So does anyone know if intel is going to be using their own version of reverse hyper threading for conroe or did amd patent it and not license the tech to anyone.


It appears that they may have, it looks like it may be branded Core Multiplexing Technology and it needs a bios revision to enable:



Xtremesystems has a discussion thread going on this as well:
http://www.xtremesystems.org/forums/showthread.php?p=15...

Some poking around by Joset and myself has revealed quite abit more work was occuring on this by Intel than what was orginally thought:

http://www.intel.com/research/mrl/library/148_collins_j...

http://www.princeton.edu/~rblee/ELE572Papers/DynamicMul...

http://www.cslab.ece.ntua.gr/courses/mpopt/papers/files...

http://www-cse.ucsd.edu/users/tullsen/pldi2005.pdf

Several Intel internal -- (i.e. found on Intel web site) -- and external publications discuss this in detail, the most interesting one are the simulations in the princeton linked paper A Dynamic Multithreaded Processor. They describe in detail the need for a strong branch preditions, shared memory subsystems close to the core, and memory disambiguation in order to fully realize effective single thread level parallism.

Jack

Hmm very interesting indeed this is much better than a vague patent. At least something for my brain to get a grasp of. I still have my doubts about the technology but well have to wait and see I suppose.
June 24, 2006 8:58:00 PM

This technology have one disadvantage. There are a lot of apps that don't use wide cores and do only one instruction per clock, in this scenario HT let another app use the free resources.

Is like graphics pipelines more in one core ore less in more chips, if app are not paralelized you can't take advantage.
June 24, 2006 9:08:38 PM

Quote:
Thank you jack you are one of the smartest people here.


:lol:  :lol:  Thanks, I am complimented but it is not so much to smarts but to resourcefulness to find useful information.

There are also many other great contributors on the forums, Joset, Spud, you,Lt Data, Iterations, even BaronMatrix brings out a good point now and again -- I will even go as far to say 9-inch occasionally pulls one out of the air. I cannot list them all but in general, even after the heated arguments, some good information can come from the debates.

Jack Me? Heavens no i only joined this forum to piss of fugger and lil fugger (Ycon).
June 24, 2006 9:29:46 PM

Quote:
So does anyone know if intel is going to be using their own version of reverse hyper threading for conroe or did amd patent it and not license the tech to anyone.


May only be available on the EE model's. I hope AMD doesnt take this approach with their implementation.
June 24, 2006 9:48:31 PM

I think what we need are benchmarks with and without the multiplexing enabled to see if it has:

1. any impact
2. how much impact

then we could see if indeed this is designed to speed up single threaded performance.

just a thought anyway.,
June 24, 2006 9:54:38 PM

Quote:
So does anyone know if intel is going to be using their own version of reverse hyper threading for conroe or did amd patent it and not license the tech to anyone.


May only be available on the EE model's. I hope AMD doesnt take this approach with their implementation.


take a closer look on the picture.. you can see there he uses conroe E6400 @ 2.13ghz. core multiplex enabled

and i dont think AMD's RHT will be successful.. maybe on K8L
June 24, 2006 10:27:15 PM

Quote:
So does anyone know if intel is going to be using their own version of reverse hyper threading for conroe or did amd patent it and not license the tech to anyone.


May only be available on the EE model's. I hope AMD doesnt take this approach with their implementation.

Interesting, why? I am interested in your opinion.

Jack

FCG @ XS has been hinting at it for months that Intel had some kind of HT related secret weapon for the EE and he was being a little bit more forward with it recently. Everyone thought that the EE would have normal hyperthreading at that time to take advantage of that fat execution engine but I have a feeling that this is what was meant to be the big suprise from Intel on launch day for the EE model of Conroe and eventually Kentsfield(which is supposed to be spectacular with 2. Unless All Conroe's already have this feature turned on than there would be no reason for Intel to give any more than they already have with the mainstream chips IMO.
June 24, 2006 10:28:55 PM

I see you mentioned me in your list of forum contributors so I'm touched.

I wasn't too optimistic of massive speedups from inverse threading from AMD, so I'd be remiss to change that opinion just because Intel is implementing it. That graph you have is quite interesting. I'm guessing it just shows the speedup in terms of execution of that single thread and not global performance boost since multiplexing would limit multitasking, which may chip away at the performance advantage. My opinion was a HT like boost usually around say a 10% boost, but in some cases decreasing performance if the processor misidentifies a thread that actually can't be split properly which would cause a stall.
June 24, 2006 10:34:09 PM

I was actually hoping for a dynamic HT mechanism by the time the chips go 45nm with larger caches. HT does show nice benefits in some cases and decreases in others so it would be great to have the best of both worlds.

What'd be interesting would be to have a dynamic HT and a dynamic Multiplexing. By great to have a quad core that could switch from 2 threads to 4 threads to 8 threads depending on the circumstance. Probably drive the Vista Task Manager crazy though.
June 24, 2006 10:47:10 PM

Quote:
I was actually hoping for a dynamic HT mechanism by the time the chips go 45nm with larger caches. HT does show nice benefits in some cases and decreases in others so it would be great to have the best of both worlds.

What'd be interesting would be to have a dynamic HT and a dynamic Multiplexing. By great to have a quad core that could switch from 2 threads to 4 threads to 8 threads depending on the circumstance. Probably drive the Vista Task Manager crazy though.


Yes I whole-heartedly agree with you here Ltdata. It seems the industry has been wasting so much silicon on raw performance in the past few years but has yet to put any of it to good use. I cant wait for computers with so many available resources which can anticipate our needs and make computing within windows a whole lot more enjoyable. Whoever design's the best all-around scalable single unit core which can be part of a greater inverse threaded envirnment as well will surely be market leader for the next few years. This may also cut down on FSB usage on QC intel chips when running in 2 thread mode because I'm sure that 2 proc's sharing a thread will not double up the memory bandwidth so it may be a bigger part of their overaul plans than anybody knows because of the added efficiency. AMD on the other hand is the wildcard here because they've obviously been working on it for a long time and the IMC gives them a nice advantage. The potential for the gaming platform that 4x4 lays on the table is fabulous as well. Imagine 8 cores working in the most efficient manner available all the time with a LL, high-speed bus directly to the vid cards and other potential candidates. I just hope they dont get run over by Intel's mighty manufacturing capacity and financial power. I'd much rather see the battle in the machines than in the courts.
June 24, 2006 10:58:16 PM

Quote:
Thank you jack you are one of the smartest people here.


:lol:  :lol:  Thanks, I am complimented but it is not so much to smarts but to resourcefulness to find useful information.

There are also many other great contributors on the forums, Joset, Spud, you,Lt Data, Iterations, even BaronMatrix brings out a good point now and again -- I will even go as far to say 9-inch occasionally pulls one out of the air. I cannot list them all but in general, even after the heated arguments, some good information can come from the debates.

Jack Me? Heavens no i only joined this forum to piss of fugger and lil fugger (Ycon). I have been suspecting for a while now, and it is now clear. Regardless of what you say, I don't really think you are a fanboy. You don't strike me as someone that ignorantly follows a company. I have a question for you, why do you act as if you are a blind follower? Anyway, that is a strange and out of place thing to say after being complimented.
June 24, 2006 10:59:39 PM

It's been mentioned many times, but the next few years are definitely very exciting in the tech industry between the CPUs, the graphics cards/DirectX 10, Vista, etc. I think everyone appreciates AMD for giving the needed jab for Intel to get off their keister and stop the stagnation. I guess I'll have to find the money to stay on top of the game though.

On the note of Multiplexing being an Extreme Edition defining feature, it occured to me that Intel may make it a i975X defining feature. Crossfire support, and Multiplexing would certainly be enough to define this older chipset. Since the flashy benefit of Multiplexing is supposed to be games, it would fit the enthousiast market of the i975X nicely.
June 24, 2006 11:00:23 PM

Quote:
Thank you jack you are one of the smartest people here.


:lol:  :lol:  Thanks, I am complimented but it is not so much to smarts but to resourcefulness to find useful information.

There are also many other great contributors on the forums, Joset, Spud, you,Lt Data, Iterations, even BaronMatrix brings out a good point now and again -- I will even go as far to say 9-inch occasionally pulls one out of the air. I cannot list them all but in general, even after the heated arguments, some good information can come from the debates.

Jack Me? Heavens no i only joined this forum to piss of fugger and lil fugger (Ycon). I have been suspecting for a while now, and it is now clear. Regardless of what you say, I don't really think you are a fanboy. You don't strike me as someone that ignorantly follows a company. I have a question for you, why do you act as if you are a blind follower? Anyway, that is a strange and out of place thing to say after being complimented. I don't know i just like amd cause my k7 still owns my cuz's northwood when we play alot of games. And i really really was impressed when amd pulled a rabbit out of their ass with k8.
June 24, 2006 11:06:31 PM

Quote:
So does anyone know if intel is going to be using their own version of reverse hyper threading for conroe or did amd patent it and not license the tech to anyone.


OF COURSE Conroe has it!!
June 24, 2006 11:09:08 PM

**squawk!**
June 24, 2006 11:14:55 PM

Quote:
OF COURSE Conroe has it!!

It seems so obvious now, but I don't believe you tried to inform us of this little fact before.
June 24, 2006 11:25:54 PM

Quote:
So does anyone know if intel is going to be using their own version of reverse hyper threading for conroe or did amd patent it and not license the tech to anyone.


May only be available on the EE model's. I hope AMD doesnt take this approach with their implementation.

Interesting, why? I am interested in your opinion.

Jack

FCG @ XS has been hinting at it for months that Intel had some kind of HT related secret weapon for the EE and he was being a little bit more forward with it recently. Everyone thought that the EE would have normal hyperthreading at that time to take advantage of that fat execution engine but I have a feeling that this is what was meant to be the big suprise from Intel on launch day for the EE model of Conroe and eventually Kentsfield(which is supposed to be spectacular with 2. Unless All Conroe's already have this feature turned on than there would be no reason for Intel to give any more than they already have with the mainstream chips IMO.

I was more interested in why you hope AMD doesn't do it :)  .... But your response to LTC_Data is good. Thanks for piping in... this is a fun topic and the discussion has finally turned to what your original post should have done :) 

You know I wonder if we've already seen this tech demo'd with Conroe already. Wouldnt it be fascinating if Intel had turned it on from day one and that is why Conroe is so fast today? The superpi times say yes but there are also some areas where Conroe is not so strong such as certain types of rendering and encoding where IMO this technology would be the most practical anyhow with long, predictable data constantly flowing through. If we havnt seen it yet and the 15-50% performance improvement claims from various sources are true then we havnt even begun to see what 07 hold for us with QC, more cache and faster busses. On the other hand if it has already been shown in current cpu's(which i doubt TBH) then AMD could deliver quite a blow to Intel with a new patch on Core2 launch day.
June 24, 2006 11:26:40 PM

Well, if this mutlplexing feature actually exists and is enabled on the chips, it probably doesn't do much. If it did, Intel would have trumpeted it long ago as part of their NGMA design.

This is the same reason why it is extremely unlikely that AM2 has "reverse hyperthreading" on it. AMD would be bragging out the wazoo about it. If it does exist, then it was clearly disabled for a reason: it doesn't work very well, and probably results in more slowdowns than speedups. If "Core Multiplexing" does exist (in the context in which we are discussing it), then it is probably the same case with Intel's implementation - it doesn't work very well.
June 24, 2006 11:31:04 PM

If this multiplexing technology does provide a considerable boost in gaming then it does explain why Core 2 is currently blowing the A64 out of the water in all gaming tests run so far.

Quite clever really. Seems such an obvious thing to do when you think about it, but then I guess the same thing can be said about a lot of clever technologies in hindsight!
June 24, 2006 11:34:45 PM

Quote:
So does anyone know if intel is going to be using their own version of reverse hyper threading for conroe or did amd patent it and not license the tech to anyone.




It's already in Core 2. There is no way just an extra issue would "leap ahead" like this. Way back with the first benchmarks I knew they enabled this.
June 24, 2006 11:36:29 PM

Quote:
If this multiplexing technology does provide a considerable boost in gaming then it does explain why Core 2 is currently blowing the A64 out of the water in all gaming tests run so far.

Quite clever really. Seems such an obvious thing to do when you think about it, but then I guess the same thing can be said about a lot of clever technologies in hindsight!


There is obviously more than one way of implementing this idea. It should be interesting to see how the two different implementations compare. :lol: 
June 25, 2006 12:01:38 AM

Quote:
It's already in Core 2. There is no way just an extra issue would "leap ahead" like this. Way back with the first benchmarks I knew they enabled this.

Somehow I doubt your all seeing eye would see Conroe perform good in March at IDF and immediately say that must be Core Multiplexing.

I doubt this feature has been enabled up to now. Certainly none of the independant reviews would have had it since the feature was just added with the latest BIOS update for the i975X. Many reviews were also done with the P965 or nVidia nForce 5 chipsets which don't have this feature either. The question is whether Intel had it at IDF. Again, it's doubtful given that it was so long ago and we've seen so many BIOS and CPU revisions since then. I don't believe the IDF numbers are completely out of whack with the independant numbers we are seeing now anyways.

Here's a recent review of the E6700. Some important things to note are that this is an older stepping 4, and this is the first to use the nForce 5 which doesn't have Core Multiplexing. Also, the nForce 5 is a early reference board so the BIOS has yet been optimized.

http://www.pcper.com/article.php?aid=265&type=expert&pi...

This review is really comprehensive and what's most important, they used DDR2 800 with 4-4-4 timings. People can no longer whine about how the FX62 is disadvantaged by slower 5-5-5 timings. This is just about as good as you can get and we see the E6700 tying or leading the FX62 just as at IDF. Some of the numbers may be a little lower because only a single X1900XTX was used instead of a X1900XT Crossfire setup. The results pretty much speak for themselves. (Note in the power consumption, EIST is not working properly, another indication of the early nature of this board, which is why the idle and full load power scores for the E6700 are almost the same, but still very impressive).
June 25, 2006 12:03:43 AM

Quote:
It's already in Core 2. There is no way just an extra issue would "leap ahead" like this. Way back with the first benchmarks I knew they enabled this.




Yea, because all that makes Conroe what it is is an extra issue in its core. Other than that, it's the exact same. I mean, it has nothing to do with the enhanced FPU units, SSE optimizations, more aggressive prefetching units in association with the larger, shared L2 cache, along with the extra decoder units..

Seriously, at least occasionally you can make it sound like you have a point, even if your logic is fatally flawed. But that comment was just ludacris. Especially since you just knew it when you first saw it at IDF. But wait, I thought those benches were faked anyway. And good for you for keeping the secret, too.
June 25, 2006 12:10:34 AM

Quote:
So does anyone know if intel is going to be using their own version of reverse hyper threading for conroe or did amd patent it and not license the tech to anyone.




It's already in Core 2. There is no way just an extra issue would "leap ahead" like this. Way back with the first benchmarks I knew they enabled this.

No no no no no, if this was implemented and functioning Intel would have touted it with a new jingle marketing doodad name. Core 2 is just a good CPU.... K8 v Banias/Dothan share almost the same IPC, Core 2 the natural extension of the P-M arch so it is not surprising that the performance boost is good, it is just that your point of reference is netburst which stunk that is why it looks to be so revolutionary.

And don't you believe that every HW site todate would have at least brought up the "Core Multiplex" option if it were available. From what the rumors are saying, only the 1184 revision on the bios shows this "enabled" feature.

And it is not just a wider issue, it is the other architectural changes that has enabled IPC to go up -- mem. disamb., macro fusion, wider SSE etc. etc. This is just something you must come to terms with, whether it is woodcrest, conroe or merom -- K8 does not have the IPC that the new architecture has... the data is very clear on this.

If you have proof otherwise please provide it.



I'm just stating my opinion. It would have been smart for them to keep it quiet so people wouldn't have excuses as to why it was faster than AM2.

There is a good chance that this works without the OS and works better with it. Again, it's all supposition. Intel did mention a new speculative excution engine when discussing Core 2.
June 25, 2006 12:22:48 AM

Quote:
So does anyone know if intel is going to be using their own version of reverse hyper threading for conroe or did amd patent it and not license the tech to anyone.


May only be available on the EE model's. I hope AMD doesnt take this approach with their implementation.

Interesting, why? I am interested in your opinion.

Jack

FCG @ XS has been hinting at it for months that Intel had some kind of HT related secret weapon for the EE and he was being a little bit more forward with it recently. Everyone thought that the EE would have normal hyperthreading at that time to take advantage of that fat execution engine but I have a feeling that this is what was meant to be the big suprise from Intel on launch day for the EE model of Conroe and eventually Kentsfield(which is supposed to be spectacular with 2. Unless All Conroe's already have this feature turned on than there would be no reason for Intel to give any more than they already have with the mainstream chips IMO.

I was more interested in why you hope AMD doesn't do it :)  .... But your response to LTC_Data is good. Thanks for piping in... this is a fun topic and the discussion has finally turned to what your original post should have done :) 

You know I wonder if we've already seen this tech demo'd with Conroe already. Wouldnt it be fascinating if Intel had turned it on from day one and that is why Conroe is so fast today? The superpi times say yes but there are also some areas where Conroe is not so strong such as certain types of rendering and encoding where IMO this technology would be the most practical anyhow with long, predictable data constantly flowing through. If we havnt seen it yet and the 15-50% performance improvement claims from various sources are true then we havnt even begun to see what 07 hold for us with QC, more cache and faster busses. On the other hand if it has already been shown in current cpu's(which i doubt TBH) then AMD could deliver quite a blow to Intel with a new patch on Core2 launch day.

I realy don't think this is the case because one core was physically disabled during the overclocking runs and it did not change the scaling on the superpi times. On top of that there are OS drivers that need to be had in order for the scheduler to take on this type of technology.

I think people are errantly extrapolating this concept as truth when neither company has officially confirmed it's existance in either architecture.

The data, information, and architectural achievements in Core 2 has already been well documented, are people so adverse to accepting the fact that Intel may have produced a good architecture this round?

Hmmmmm....

Dont get me wrong, I dont believe it has been enabled as of yet as even yonah produced WR pi times before Conroe first hit which is perplexing since yonah was essentially just Dothan x 2 with Core2's cache design slapped on. I was merely speculating on a purely fictional scenario here and trying to shine the spotlight on AMD just a little bit brighter as you've probably noticed I try to innocently do from time to time :p 

I think all of the speculation is wonderful because it shows renewed interest in my favourite debatable internet subject. We've all been sitting around with the same basic performance bumps from AMD for the past 3 years waiting for Intel to catch up and to me it seems impossible for AMD to have stood still R&D-wise in that time but given the lack of recent annoucements it's a hard time to be an AMD fan. All of a sudden out of the blue Intel comes up with something that is 40-100% faster clock/clock than the current king of the hill, runs cooler, and seems to o/c endlessly without issue. It makes K8 fan's turn to AMD for their response which has yet to be fully recieved. This kind of rampant speculation sparks interest in a subject that I have been finding harder and harder to pay attention to recently and I love it :lol: 
June 25, 2006 12:26:04 AM

(Damn it sorry i'm replying so slow guys i got a few freinds over and they're on youtube watching video's with my comp I can only post when the video's are over sorry.) Now to what k8man said listen if revcerse hyper threading works like it's supposed to then will we have super pi times in milli-seconds soon?
June 25, 2006 12:44:40 AM

Quote:
(Damn it sorry i'm replying so slow guys i got a few freinds over and they're on youtube watching video's with my comp I can only post when the video's are over sorry.) Now to what k8man said listen if revcerse hyper threading works like it's supposed to then will we have super pi times in milli-seconds soon?


I dont think we'll see millisecond times any time soon unless CPU maker's start releasing CPU driver's optimized for benchmarks which quite frankly is a scary thought.

Quick edit: I cant believe how bad that article makes the 965 EE look. Between Conroe and the FX62 it get's absolutely slaughtered in almost every bench.
June 25, 2006 12:54:05 AM

(Sorry for late reply agian. :cry:  ) I think if reverse threading works we should start seeing super pi in half a second. :wink:
June 25, 2006 12:54:55 AM

Quote:
Dont get me wrong, I dont believe it has been enabled as of yet as even yonah produced WR pi times before Conroe first hit which is perplexing since yonah was essentially just Dothan x 2 with Core2's cache design slapped on.


Its far more then that.
June 25, 2006 12:55:31 AM

The way i see it is RTH wouldn't be that great for 1 dual core. BUT in a server market it would be quite amazing in a 4 way server because you still ahve the parralleism of 4 cores but you have the speed of 2 cores doing one thing or in 4x4 this would be good too.
June 25, 2006 1:02:44 AM

Quote:
Dont get me wrong, I dont believe it has been enabled as of yet as even yonah produced WR pi times before Conroe first hit which is perplexing since yonah was essentially just Dothan x 2 with Core2's cache design slapped on.


Its far more then that.

You'll have to forgive me, that's my ignorance talking there in that last post. What other major improvements did we see in Yonah that werent a part of Dothan? Conroe is 80% new compared to Yonah so what is it that made it so Pi-friendly?
June 25, 2006 1:09:37 AM

Independent voltages in the cores, simple decoders can now do SSE, deeper sleep, shared L2 cache, fusion for SSE loads, proper SSE2, heaps of other crap.
June 25, 2006 1:11:55 AM

Quote:
So does anyone know if intel is going to be using their own version of reverse hyper threading for conroe or did amd patent it and not license the tech to anyone.




It's already in Core 2. There is no way just an extra issue would "leap ahead" like this. Way back with the first benchmarks I knew they enabled this.

Moo.
I Knew You Knew You Didn't Knew!
June 25, 2006 1:31:04 AM

Quote:


MMMMMMMMMM beef
June 25, 2006 1:34:25 AM

Thank you see everytime spud says MOO i give him a cow every time he says WORD i give him a cat.
June 25, 2006 3:14:29 AM

Quote:
Thank you see everytime spud says MOO i give him a cow every time he says WORD i give him a cat.


Well let's hope he's grown out of yelling PENIS!
June 25, 2006 3:30:57 AM

Quote:
It's already in Core 2. There is no way just an extra issue would "leap ahead" like this. Way back with the first benchmarks I knew they enabled this.




Yea, because all that makes Conroe what it is is an extra issue in its core. Other than that, it's the exact same. I mean, it has nothing to do with the enhanced FPU units, SSE optimizations, more aggressive prefetching units in association with the larger, shared L2 cache, along with the extra decoder units..

Seriously, at least occasionally you can make it sound like you have a point, even if your logic is fatally flawed. But that comment was just ludacris. Especially since you just knew it when you first saw it at IDF. But wait, I thought those benches were faked anyway. And good for you for keeping the secret, too.


Hopefully you prposely misspelled ludicrous. Sure Core 2 is updated and new but even Intel said there wasn't alot "new" just borrowed from PM and P4. They did talk about a brand new "speceulative execution algorithm."

As I said with AMDs "SUPPOSED" Dynamic Threading prefetch, OoO (mem disambig) and the ike are necessary to enable this tech. As I also mentioned and a post from JJ showed a link which talked about "Optimized Slices." I'm not even sure this would need a "patch" or BIOS support in that it's not an exposed algorithm. It may be that the "exposed" component on the mobo may talk to ACPI to "override" the power savings.

This is supposition though considering that I didn't read those links yet.
June 25, 2006 5:51:38 AM

agreed... Kudo's to DVDPiddy! :D 
June 25, 2006 5:56:32 AM

Quote:
Thank you jack you are one of the smartest people here.


:lol:  :lol:  Thanks, I am complimented but it is not so much to smarts but to resourcefulness to find useful information.

There are also many other great contributors on the forums, Joset, Spud, you,Lt Data, Iterations, even BaronMatrix brings out a good point now and again -- I will even go as far to say 9-inch occasionally pulls one out of the air. I cannot list them all but in general, even after the heated arguments, some good information can come from the debates.

Jack Me? Heavens no i only joined this forum to piss of fugger and lil fugger (Ycon). I have been suspecting for a while now, and it is now clear. Regardless of what you say, I don't really think you are a fanboy. You don't strike me as someone that ignorantly follows a company. I have a question for you, why do you act as if you are a blind follower? Anyway, that is a strange and out of place thing to say after being complimented.

:wink: He was being facetious, but my compliment was sincere; piddy is clearly loyal to the AMD brand but his posting is not fanatical, he doesn't pull up rumored info or fabricate capabilities that don't exist and he listens to others ideas.... everyone has brand preferences, that's fine -- Piddy you're an ok dude :)  ....

Jack It isn't his post that triggered me to publish that post, it is his signature and location that did. Both spawn hatred yet he doesn't seem to reflect that which is his. I'm quite perplexed, to say the least.
June 25, 2006 6:09:36 AM

No, Prescott was cool when THG decided to overclock it with liquid nitrogen. Negative two hundred and six, baby!
June 25, 2006 6:19:53 AM

FlipFlop, why did you delete your post? Yes, I saw it.
      • 1 / 2
      • 2
      • Newest
!