First of all, know that a couple weeks ago I didn’t know it was even possible to build a computer (other than the manufacturers), so my knowledge is very limited.
I’ve been looking into it but got stuck in one area: synchronizing the memory, buses, and processor. This is what I know so far (or think I know):
All the circuits must be synchronized based on the system clock in order for the computer to function optimally. The RAM and processor should be able to send and receive data at the same rates? Circuits that run at different speeds than the FSB use either a divider or a multiplier. This is OK for the CPU because it doesn’t have to send or receive data every clock cycle. But beyond this, I don’t understand much.
For example, what if I have:
AMD Athlon 64 X2 Dual Core at 2 GHz
A pair of 512 MB DDR2-800 RAM (for a total of 1 GB)
FSB at 1000 MHz
Dual Channel Memory
The processor’s multiplier would be 2? So 1000 MHz * 2 = 2 GHz. But then there are two cores sharing one FSB, right? So would the multiplier actually be 4? Also, aren’t Athlons double-pumped? Then each core would send and receive a signal twice a clock cycle. But how would that be since they are sharing a FSB? Then there is the RAM. DDR means double data rate, which would match the processor’s double pump, correct? And there is a pair of DDR2’s to utilize the dual channel, which would match the cpu’s dual core, but the DDR2 runs at 800 MHz, so how would they be able to send and receive data in a synchronous manner?
Anyway, can someone explain all this, or give an article or something explaining it.
I’ve been looking into it but got stuck in one area: synchronizing the memory, buses, and processor. This is what I know so far (or think I know):
All the circuits must be synchronized based on the system clock in order for the computer to function optimally. The RAM and processor should be able to send and receive data at the same rates? Circuits that run at different speeds than the FSB use either a divider or a multiplier. This is OK for the CPU because it doesn’t have to send or receive data every clock cycle. But beyond this, I don’t understand much.
For example, what if I have:
AMD Athlon 64 X2 Dual Core at 2 GHz
A pair of 512 MB DDR2-800 RAM (for a total of 1 GB)
FSB at 1000 MHz
Dual Channel Memory
The processor’s multiplier would be 2? So 1000 MHz * 2 = 2 GHz. But then there are two cores sharing one FSB, right? So would the multiplier actually be 4? Also, aren’t Athlons double-pumped? Then each core would send and receive a signal twice a clock cycle. But how would that be since they are sharing a FSB? Then there is the RAM. DDR means double data rate, which would match the processor’s double pump, correct? And there is a pair of DDR2’s to utilize the dual channel, which would match the cpu’s dual core, but the DDR2 runs at 800 MHz, so how would they be able to send and receive data in a synchronous manner?
Anyway, can someone explain all this, or give an article or something explaining it.
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