32nm....what then?

Intel has been very open about scaling down processors on new transistor sizes, but when will it end? Intel has talked about 32nm but nothing passed that. There is a physical limit to how small it can get before a processor leaks to much to be useful. Does anyone have an educated guess as to how small they can get before it needs to switch over to something more efficent and scaliable? Also how will Intel deal with them memory bandwidth issues of multiple cores? I mean in the sense that sooner or later they will also hit a wall with processor pins, how will they deal with that? Lucky for us both companies wont run into these problems for a while, just they are coming to be somewhat of a puzzle to me.

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There's a limit coming up to how small they can go with their current process, but they can switch materials (photons, single electrons, flux capacitor, whatever), etc... and perhaps go even smaller. But yes, no matter what they do they will hit a limit, the building blocks of our universe are only so big.

Reply to TechnologyCoordinator

this might help what your looking for. i cant tell you much technical detail on the information your asking, so wait till someone comes around with there info on that, but some of that might be answered in the link provided. (i would try and elaborate on some of the info in the link, but im about to go to bed and quite tired)

22nm is the next one down according to that article

http://www.dailytech.com/article.aspx?newsid=2649

hope that helps

EDIT:- JumpingJ beat me to it "Ill get you next time heman"

Reply to -Mithridate-

Here is the official schedule given at the Fall 2005 IDF:

http://www.legitreviews.com/article.php?aid=234

Quote :

2012 – 22nm – 32 billion transistors
2014 – 16nm – 64 billion transistors
2016 – 11nm – 128 billion transistors
2018 – 8nm – 256 billion transistors

There's also a nice little PPT for embedded techologies that shows their process techology on slide 4.

http://www.emea-distributor.com/do [...] logies.ppt

This roadmap is a little bit more aggressive than the Fall IDF numbers with all the dates pushed 1 year ahead. It's possible the PPT quotes when the process is online while IDF quotes projected product availability. The PPT also gives their prototype schedule, which is that they always plan on having prototypes at least 2 processes ahead.

Reply to ltcommander_data

When do I get my phototronic and quantum CPU?

Reply to gman01

Quote :

There's a limit coming up to how small they can go with their current process, but they can switch materials (photons, single electrons, flux capacitor, whatever), etc... and perhaps go even smaller. But yes, no matter what they do they will hit a limit, the building blocks of our universe are only so big.

Ahh....I always new flux capacitors were they way to go.

Reply to qurious69ss

They already have universities running quantum computers.
They haven't gotten it to work in 8-bit yet, and further development is hampered somewhat because we haven't figured out everything there is to know about quantum physics. Although, great strides have been made.
http://computer.howstuffworks.com/quantum-computer.htm

Photonic computing is actually very similar to standard electronic computing but had been held back by the necessity of being able to cancel a ray of light with another ray of light.(like stopping a bullet with another bullet) It has been done but is hard to reproduce consistently and massproduce. Hence it is not yet practical. Strides are being made, though.

EDIT:
Sorry, forgot why I had originally started to post. The physical size limit of a transistor is reached when only 1 electron is controled by the transistor. Safe to say that is a bit off yet.

However, starting around 32nm(roughly) we will have to start worrying about "sympathetic" electron flow. So the distance between transistors could become an issue as much as the actual size.

Reply to BGP_Spook

I wanted to know about the quantum computers (The ones that miltiply q-bits).
I heard about them for years. But is that STILL just theory?
Or has SOMEONE made SOMETHING of SOMEPART that did SOMETHING SOMETIME in SOME lab SOMEPLACE?
BGP_Spook, thanks the the link. I'll be impressed to see ANY q-computer calculate ANYTHING.

Reply to enewmen

My way out thoery is chips will switch to single atom vibrations powered by different powered and read by different wavelenghts of light ! kind of like a two sidded lazer powered abacus !!! lol ok so im nuts

Edit: On thinking about it maybe its not such a bad idea only switch to microwaves on one side light to read hmmm THz chip !!! fun to think about

Reply to JonathanDeane

Besides quantum computing (already mentioned by BGP) there is another possible alternative. Carbon Nanotubes. Here's a link.

The interesting thing about carbon nanotubes is they can be semiconductors, due to "Quantum Tunneling" (Link), carrying signals. They can also modify their electrical and mechanical behaviour according to the geometrical shape given.

Reply to Multiplectic

Quote :

Here is the official schedule given at the Fall 2005 IDF:

http://www.legitreviews.com/article.php?aid=234

2012 – 22nm – 32 billion transistors
2014 – 16nm – 64 billion transistors
2016 – 11nm – 128 billion transistors
2018 – 8nm – 256 billion transistors

First of all, those numbers can't be right. The Core 2 chip has about 300m transistors. So, assuming a constant die size of about 150mm^2, you're looking at about 600m transistors for 45nm, and 1.2 billion transistors for 32nm, and 2.4 billion transistors for 22nm (roughly). A 32 billion transistor die at the 22nm node would need to be about 1880mm^2!

Second, I can see the "two year cycle" continuing through 2010 with 32nm. Maybe even 2012 with 22nm. But after that, things are going to slow down. I know people have been prophesizing this for decades, but at sizes that small, single atoms become huge chunks of the transistor. Even at 65nm this is the case, as certain parts of the transistor are simply not shrinkable anymore, as they begin to consist of only two of three atoms. At below 32 or 22nm, (I would guestimate), it no longer becomes an issue of simply upgrading the lithographic process and a slight modification to the silicon wafers. It would require radical new materials and concepts to continue to decrease in size.

Then again, I could be wrong.

Reply to ethernalite

Quote :

I wanted to know about the quantum computers (The ones that miltiply q-bits).
I heard about them for years. But is that STILL just theory?
Or has SOMEONE made SOMETHING of SOMEPART that did SOMETHING SOMETIME in SOME lab SOMEPLACE?
BGP_Spook, thanks the the link. I'll be impressed to see ANY q-computer calculate ANYTHING.

IBM has been playing with those for some time.
They have managed to build a 5-QBit Quantum Computer.
A couple of links (they're kinda old, but useful): Here and here.

Reply to Multiplectic

We're currently @ 65 and not yet at a stable 45nm. Nobody really knows the effects of EM or temperature at these steps so the limit may be even before 32nm.

Reply to m25

Quote :

We're currently @ 65 and not yet at a stable 45nm. Nobody really knows the effects of EM or temperature at these steps so the limit may be even before 32nm.

I have read that IBM has already created prototype 32nm chips for it next series of 'cell cpu's.... But if you follow cell, you know they are having problems with current manufacturing.... They throw out about 4 out of every 5 they make....

Reply to gman01

Quote :

We're currently @ 65 and not yet at a stable 45nm. Nobody really knows the effects of EM or temperature at these steps so the limit may be even before 32nm.

I have read that IBM has already created prototype 32nm chips for it next series of 'cell cpu's.... But if you follow cell, you know they are having problems with current manufacturing.... They throw out about 4 out of every 5 they make....

Exactly, and in PC CPUs is exponentially worse because they run much faster and much hotter. We haven't even tested the long term stability of 65nm since it's been around for only ~1year. 32 nm is an exciting figure but you have to think of many connections made by 1 atom, i'ts very easy for that atom to be kicked off, even in normal operation.

Reply to m25

I'd say by the time Intel's ready to jump off the 32nm boat it will be about time for Silicon Geranium chips; or even better Carbon Nanotube; both have better performance per price ratios then silicone and are cheaper.

Reply to S7A88Y

BTW - If anyone has read the book or is interested, pick up a copy of "Visions" by Michio Kaku; Michio Kaku explains alot of ideas that could be possible in the future w/ computers and amongst other interesting topics.

Mike

Reply to thematrixhazuneo

Quote :

I'd say by the time Intel's ready to jump off the 32nm boat it will be about time for Silicon Geranium chips; or even better Carbon Nanotube; both have better performance per price ratios then silicone and are cheaper.

IBM has made headway with Carbon Nanotube. I imagine that this tecnology will be developed enough to be implemented by the time sub-32nm chips are needed.

http://domino.research.ibm.com/comm/research_projects.nsf/pages/nanotube_ringoscillator.animation.html

Reply to exit2dos

Itanium Montecito Dualcore with 24 Mb of cache is 1 billion transistor on 65nm.

so
2005 - 65nm - 1 billion
2007-8 - 45nm - 2 billion
2010 - 32nm - 4 billion
OOOPs
2012 – 22nm – 32 billion transistors
2014 – 16nm – 64 billion transistors
2016 – 11nm – 128 billion transistors
2018 – 8nm – 256 billion transistors

yeah looks like a missing link somewhere...lt_com can probably enlight us

Reply to Anonymous

All my work and research in academia pertaining to transistor design and research pertaining to transistor leakage... most professors expect transistors to keep advancing for another 5 to 10 years.

BUT (and this is a big but) each new improvements in transistors is exponentially more expensive. So I predict traditional improvements through smaller transistors for 65nm and 45 and 32nm.

After 32nm anything more improved will be PROHIBITIVELY expensive to research, manufacture. Assuming you even get a solid manufacturing process. They will not be stable. At such small sizes the transistor will react unstably from small EM disturbances.

But you will get better transistors from 32nm... I just believe they will start hating transistors due to the HUGE cost to research... and manufacture.

------

That is when quantum computing will seem CHEAP in comparison and the transistion will occur.

Or they will use organic computers.

Or they will start using the same transistors but Async circuit designs instead. For all of you NOT in the know. All current processors are clocked circuits. Async circuits do not have any clock to drive the components. heres some stuff on that: http://en.wikipedia.org/wiki/Asynchronous_circuit

i wrote about it before:

Quote :

Power will always increase as performance increases. It's that simple.

The reason this is true is because current technology requires more transistors to get higher performance or higher clock.

---------------

What you can hope for is to have more efficient designs that don't waste as much power with sloppy brute force hardware design.

---------------

The only way to get lower power I know of with transistors is to use Asynchronous circuit design instead of Clocked/Sequential/Synchronous circuits. But that'll never happen in the desktop realm =P.

p.s. for those of you http://en.wikipedia.org/wiki/Asynchronous_circuit . "An asynchronous circuit is a circuit in which the parts are largely autonomous. They are not governed by a clock circuit or global clock signal... Lower power consumption due to the fact that no transistor ever transitions unless it is performing useful computation (clock gating in synchronous designs is an imperfect approximation of this ideal)"

The original statement that I made "Power will always increase as performance increases. It's that simple." is a general rule much like moore's law.

And much like moore's law you will see exceptions to it like the conroe. Like when a new processor comes out early and it breaks moore's law. Or if one comes out late a breaks moore's law.

---------

Even with new architectures like conroe as performance increases eventually they will use more power. Take for example a conroe clocked at 2.6Ghz and then another at 3.2Ghz. The 3.2 will use more than the 2.6Ghz.

Then eventually power consumption will increase until conroe is using as much power as the old netburst architecture. This will happen a couple years down the road. But at that point conroe will have better performance than netburst at the same power. But it still follows that as performance increases so too does power in this example of conroe.

--------

Reply to syn1kk

Interesting, thanks. also on wikipedia, (for the other it's pretty sure you know that stuff already) you can read on Extrem Ultra Violet and immersion lithography. They clearly state, just like you, that around 22nm, the cost will probably go up a lot, the mirror will have to be smooth at the atomic level, the mask in use will have to be much more complex, etc.

On the other hand that's to be expected, these newer lithography process are much more complex and much more evolved than what we have today...

Reply to Anonymous

Quote :

BTW - If anyone has read the book or is interested, pick up a copy of "Visions" by Michio Kaku; Michio Kaku explains alot of ideas that could be possible in the future w/ computers and amongst other interesting topics.

Mike

Looks interesting but nobody will put a cent of investment until they have squeezed the last drop of silicon.

Reply to m25

Quote :

Interesting, thanks. also on wikipedia, (for the other it's pretty sure you know that stuff already) you can read on Extrem Ultra Violet and immersion lithography. They clearly state, just like you, that around 22nm, the cost will probably go up a lot, the mirror will have to be smooth at the atomic level, the mask in use will have to be much more complex, etc.

On the other hand that's to be expected, these newer lithography process are much more complex and much more evolved than what we have today...

The real question is; will the 32 or 22nm chips withstand thermal and electrical stress well enough. Serious problems were arising since 90nm, got worse in 65 nm... The problem is with the structure itself, not the way it's manufactured.

Reply to m25

You are missing something here also. Assuming they can solve the heat/electrical issues in a controlled test.

at this size ... the signals are easily affected by minor Electromagnetic interference... which is even more of a problem.

Reply to syn1kk

I heard that someone was trying to make diamond cpus that can resist extreme temperatures and can be clocked at much higher speeds then today's silicon processors.

Reply to RawStorm

Quote :

I heard that someone was trying to make diamond cpus that can resist extreme temperatures and can be clocked at much higher speeds then today's silicon processors.

Yeah, this has to do with using the light. They are also making quantum CPUs and organic CPUs. The current problem with these kinds of CPUs is that there is no way for the CPU to simply "switch". Think of a computer based on fiber optics. While it can be VERY fast, it uses mirrors to control the light. The mirrors need to control the light, so while the data travels at the speed of light, the CPU can only switch as fast as the mirrors.

Every time the mirrors are repositioned, the problem is solved "at the speed of light", but the mirrors all need to be re-adjusted to solve the next problem.

This is currently what limits computers based on these type of circuits. While they are VERY effecient at solving a problem, a seperate system has to be built for each problem, because there is no on-off circuit that switches as fast as the data.

Carbon nanotubes on the other hand to have this capability and looks to have a very good future.

Age of Spiritual Machines - A good book that discusses the future of computing.

Reply to xsandman

After 32 nm comes 9 nm. :lol:

Reply to djkrypplephite

The diamond cpus I was talking about had nothing to do with light.
Here's the link: This
The diamond just makes the cpu resist heat. You can't clock a Prescott to 10GHz without it frying, but a diamond cpu will be able to be stable at those speeds.

Reply to RawStorm

Quote :

We're currently @ 65 and not yet at a stable 45nm. Nobody really knows the effects of EM or temperature at these steps so the limit may be even before 32nm.

A couple of points...

If you look back at just about any point over the last 2 or 3 decades, the "sky has always been falling" about 2 or 3 process generations out...

Yet somehow these guys always pull it off. At some point it will end, to be sure, but based on history, I'd be more inclined to bet on these guys rather than against them.

That being said, there are two really big things that need to be beaten before they can do the 32 nano and smaller generations...

1) - The need to go to reflective optics as opposed to transparent optics- currently chips are made by passing lights (193 nano laser to be exact) though what is more or less a negative, similar to developing a photo, and then using that light to photo etch the chip.

At or about 32 nano there are no materials left that are trasparent to the wave length of light needed to etch the chips (The feature size needs to be at least 1/2 the size of the wave length of the light being used to make it - yes I know that 65 nanos is less than 1/2 of 193 nano now being used, but they are "cheating" using photo-emersion techniques - and they are at (or at least close) the edge of how far they can cheat)

2) - The actual transisters are becoming so small that quantum effects are starting to show up (they have error correction to catch them, but they can correct for only so many) - Individual transisters are now down to a few thousand atoms, when this become a few hundred, or even a few dozen, quantum effects in electron propagation will eventually swamp an potential error correction routines design to combat them.

As I have said, the high IQ boys at the foundries have solved so many "impossible" problems in the past it's darn hard to bet against them, but if they solve the above two issues, they will certainly have earned they big salaries a few times over...

Reply to the_vorlon

After 32nm if there will be no scientific breakthroughs for a while, Intel may just continue increasing cache sizes and just add new features.

Reply to Itanium_Fanboi

Quote :

After 32nm if there will be no scientific breakthroughs for a while, Intel may just continue increasing cache sizes and just add new features.

that doesnt jive with moores law,but then again the industry is having it tough keeping up with his take on tech.

Yeh, but as I recall, and I could easily be recalling incorrectly, the whole multi core thing was originally a response to continue increasing processor transistor count when the then impassable "limit" of 90nm was achieved. When they thought 90nm was as small as it was going to get, and they could no longer increase the # of transistors on die, the only way to continue increasing the transistor count IAW moores law was to multiply the # of cores

Reply to turpit

Quote :

Yeh, but as I recall, and I could easily be recalling incorrectly, the whole multi core thing was originally a response to continue increasing processor transistor count when the then impassable "limit" of 90nm was achieved. When they thought 90nm was as small as it was going to get, and they could no longer increase the # of transistors on die, the only way to continue increasing the transistor count IAW moores law was to multiply the # of cores

I do not think the 90nm limit was ever really a limit. Intel had an extremely smooth transition from 90nm to 65nm. This was never an issue. Not to mention when Intel didn't come out with the dual core until they were WELL aware of 65nm, and 65nm came out very soon after Smithfield came out.

AMD and Intel aren't necesarrily trying to compete against Moore's law as much as they are trying to compete with each other and make more profits. I also feel that AMD had dual core in their roadmaps longer than Intel and Intel's Smithfield was Intel's reaction to AMDs dual core as it was a much simpler and not as effective of a design.

Reply to xsandman

Quote :

Intel has been very open about scaling down processors on new transistor sizes, but when will it end? Intel has talked about 32nm but nothing passed that. There is a physical limit to how small it can get before a processor leaks to much to be useful. Does anyone have an educated guess as to how small they can get before it needs to switch over to something more efficent and scaliable? Also how will Intel deal with them memory bandwidth issues of multiple cores? I mean in the sense that sooner or later they will also hit a wall with processor pins, how will they deal with that? Lucky for us both companies wont run into these problems for a while, just they are coming to be somewhat of a puzzle to me.

The fact is that Intel will have lots of headaches going to 45nm becasue of the following issues:

1) They lack SOI-SiGE.

2) Their process manufacturing isn't as spectacular as AMD's.

AMD would only be 4-6 months behind intel in 45nm which means that intel's advantage over AMD in process shrinking will vanish. :wink:

Reply to 9-inch

So how is it that Intel chips overclock so much better than your spectacularly manufactured amd chips?

Reply to TheMaster

Well they are already farther than that behind Intel with 65nm, and seems they are having trouble with yeilds... 45nm will actually probably put them farther behind the eight ball, imo... time will tell, and you forget your BS posting a few months back... that Conroe would be a flop, AMD would hit 65nm first... etc etc etc... Well time has told us over and over again that you 9nm are the one that is and was and will be wrong again and again and again...

Reply to RichPLS

Quote :

Intel has been very open about scaling down processors on new transistor sizes, but when will it end? Intel has talked about 32nm but nothing passed that. There is a physical limit to how small it can get before a processor leaks to much to be useful. Does anyone have an educated guess as to how small they can get before it needs to switch over to something more efficent and scaliable? Also how will Intel deal with them memory bandwidth issues of multiple cores? I mean in the sense that sooner or later they will also hit a wall with processor pins, how will they deal with that? Lucky for us both companies wont run into these problems for a while, just they are coming to be somewhat of a puzzle to me.

The fact is that Intel will have lots of headaches going to 45nm becasue of the following issues:

1) They lack SOI-SiGE.

2) Their process manufacturing isn't as spectacular as AMD's.

AMD would only be 4-6 months behind intel in 45nm which means that intel's advantage over AMD in process shrinking will vanish. :wink:

1) Intel has already stated it is not cost effective to use SOI until around 32nm. Additional Intel wishes to further the technology with regards to the fact that the current implementation of SOI is only a partial depletion. They are aiming for 100% depletion which takes time to research as well.

1-Why.

Quote :

Intel says SOI is still too expensive. A spokesman argued that even a small amount of extra cost, multiplied by the 100 million or so chips Intel produces per year, makes SOI's cost prohibitive...

2-Why.

Quote :

The Terahertz transistor will contain three major changes, Willoner noted. First, the transistors will feature thicker source and drain regions, substructures inside individual transistors that allow electrical current to pass. Second, the company will embed an insulating layer, called Ultra Thin SOI, below the source and drain.

Third, Intel will change the chemical composition of the gate oxide, a layer that connects the transistor gate to the source and drain...

But the technology could find its way into 45nm nodes as well, with regards to Intel implementing tri-gate transistors at that node.

Research to development.

2) I would beg to differ with regards to Intel leading the pack by 4+ quarters is a significant achievement, and showed a smooth transition to the new node.

Why.

Typically a mature yield is described as being 85%-95% working silicon, but 60% for the 1st year of a new node is commonly considered mature as well so it's a coin toss as to what the real yields are at for Intel but I would have to think they would be in the 70%-80% range realistically.

My faith in AMD being 4-6 months behind Intel on the 45nm node is laughable as Intel is closing on the 1 year mark of 65nm node production while AMD is still trying to get 65nm online. How on earth will AMD be able to match the process shift set by Intel when they are clearly behind a node already?

Reply to spud

Quote :

Intel has been very open about scaling down processors on new transistor sizes, but when will it end? Intel has talked about 32nm but nothing passed that. There is a physical limit to how small it can get before a processor leaks to much to be useful. Does anyone have an educated guess as to how small they can get before it needs to switch over to something more efficent and scaliable? Also how will Intel deal with them memory bandwidth issues of multiple cores? I mean in the sense that sooner or later they will also hit a wall with processor pins, how will they deal with that? Lucky for us both companies wont run into these problems for a while, just they are coming to be somewhat of a puzzle to me.

The fact is that Intel will have lots of headaches going to 45nm becasue of the following issues:

1) They lack SOI-SiGE.

2) Their process manufacturing isn't as spectacular as AMD's.

AMD would only be 4-6 months behind intel in 45nm which means that intel's advantage over AMD in process shrinking will vanish. :wink:

This is EXTREMELY laughable!!

1. Doesn't Intel already use some form of SiGE? (i am not completely sure, just asking, i remember jack mentioning this). It also looks like AMD is having trouble moving SOI from 90nm to 65nm, maybe its a good thing Intel isn't using SOI.

2. Their process doesn't have SOI. That doesn't mean it is inferior to AMDs. In fact, Jack will argue that it is better. Do you want me to provide a link?

WOW, only 4-6 months? This is VERY highly unlikely! This would mean that AMD can ramp up 45nm in less than 1 year!!!! That would be absolutely CRAZY and EXTREMELY unlikely!

Reply to xsandman

Quote :

Intel has been very open about scaling down processors on new transistor sizes, but when will it end? Intel has talked about 32nm but nothing passed that. There is a physical limit to how small it can get before a processor leaks to much to be useful. Does anyone have an educated guess as to how small they can get before it needs to switch over to something more efficent and scaliable? Also how will Intel deal with them memory bandwidth issues of multiple cores? I mean in the sense that sooner or later they will also hit a wall with processor pins, how will they deal with that? Lucky for us both companies wont run into these problems for a while, just they are coming to be somewhat of a puzzle to me.

The fact is that Intel will have lots of headaches going to 45nm becasue of the following issues:

1) They lack SOI-SiGE.

2) Their process manufacturing isn't as spectacular as AMD's.

AMD would only be 4-6 months behind intel in 45nm which means that intel's advantage over AMD in process shrinking will vanish. :wink:

1) Intel has already stated it is not cost effective to use SOI until around 32nm. Additional Intel wishes to further the technology with regards to the fact that the current implementation of SOI is only a partial depletion. They are aiming for 100% depletion which takes time to research as well.

1-Why.

Quote :

Intel says SOI is still too expensive. A spokesman argued that even a small amount of extra cost, multiplied by the 100 million or so chips Intel produces per year, makes SOI's cost prohibitive...

2-Why.

Quote :

The Terahertz transistor will contain three major changes, Willoner noted. First, the transistors will feature thicker source and drain regions, substructures inside individual transistors that allow electrical current to pass. Second, the company will embed an insulating layer, called Ultra Thin SOI, below the source and drain.

Third, Intel will change the chemical composition of the gate oxide, a layer that connects the transistor gate to the source and drain...

But the technology could find its way into 45nm nodes as well, with regards to Intel implementing tri-gate transistors at that node.

Research to development.

2) I would beg to differ with regards to Intel leading the pack by 4+ quarters is a significant achievement, and showed a smooth transition to the new node.

Why.

Typically a mature yield is described as being 85%-95% working silicon, but 60% for the 1st year of a new node is commonly considered mature as well so it's a coin toss as to what the real yields are at for Intel but I would have to think they would be in the 70%-80% range realistically.

My faith in AMD being 4-6 months behind Intel on the 45nm node is laughable as Intel is closing on the 1 year mark of 65nm node production while AMD is still trying to get 65nm online. How on earth will AMD be able to match the process shift set by Intel when they are clearly behind a node already?

Looks like a really good summary and can not argue against it. Intel has demonstrated working SRAM at 45nm, while AMD claims they have 45nm SRAM, they have not even claimed to have it working, let alone providing a picture of it. And they really expect to have 45nm within 4-6 months after Intel? I do not see AMD getting <1year behind Intel's nodes.

Reply to xsandman

Where have you been hiding 9nm? BM has dethroned you as the forum idiot, can you make a comeback and retake your title?

Reply to Action_Man

I don't think it is fair to compare BM to 9nm. He is actually helpful in some threads and does not always take AMD's side.

He certainly argues like an idiot sometimes, but not always.

Reply to M_with_one_M

Quote :

what makes intels transistors faster?and someone mentioned quantum effects as transistors shrink,i have recently refreshed my memory on atomic structure and i am just not putting that together.
and one groovy thing i discovered is that i have a grasp of the periodicals table,without a formal introduction,for years i gave it a blank stare,, :lol:

Quantum effects...

Electrons randomly change quantum states within an atom based upon total system energy. To make the math really simply, let's say that there is only one dimension - up and down.

If you have 10,000 atoms, the odds are staggeringly high that the numbers vibrating "up" with always be very similar to the number vibrating "down"

When you have 1000 atoms, the probabilities shift substantially, but the odds still favor massively a reasonable balance.

When you get to 100 or 10, the chance get much higher of a quantum alignment that displaces electrons in a disruptive way...

It's a lot more complicated than this, but it's a sketch of why...

Reply to the_vorlon

Quote :

Intel has been very open about scaling down processors on new transistor sizes, but when will it end? Intel has talked about 32nm but nothing passed that. There is a physical limit to how small it can get before a processor leaks to much to be useful. Does anyone have an educated guess as to how small they can get before it needs to switch over to something more efficent and scaliable? Also how will Intel deal with them memory bandwidth issues of multiple cores? I mean in the sense that sooner or later they will also hit a wall with processor pins, how will they deal with that? Lucky for us both companies wont run into these problems for a while, just they are coming to be somewhat of a puzzle to me.

The fact is that Intel will have lots of headaches going to 45nm becasue of the following issues:

1) They lack SOI-SiGE.

2) Their process manufacturing isn't as spectacular as AMD's.

AMD would only be 4-6 months behind intel in 45nm which means that intel's advantage over AMD in process shrinking will vanish. :wink:

I have only one answer: Economies of Scale. No matter how good you claim AMD's manufacturing capabilities, Intel will still have the upper hand because the quantity of their products makes up for it.

Now that NGMA has been released, maybe we should all just be happy at the good things to come instead of bashing each other.

9-inch, you don't want to be called a BS Accelerator right?
Next News in the Inquirer:
Announcing the BS Accelerator co-processor for AMD platforms codename 9-inch. :lol:

Just kidding

Reply to Itanium_Fanboi

Quote :

Well --- it actually is a quantum leap. The mathematical implication here is fairly easy (after some rigorous study) to derive -- there is a finite probably that an object approaching a potential energy barrier will simply disappear and reappear on the other side.

This is like saying if you run head first into a closed door and repeat it many many times, then quantum mechancis says that there is a finite (but infinitessimally small) probability that you will at one point simply appear on the other side of the door ... I don't recommend trying, but for small particles moving very fast, number in the E20 to E23 numbers, some of them actually make it through. ... This is the quantum effect

Hahaha.... man... if only professors used that explanation, college would have been much easier.... or atleast the basic concepts. :lol:

Reply to xsandman

A dimond at $5! Wowza! Its amazing how fast and far technology advances, imagine what we will all see in our old age!

Reply to MatTheMurdera

Quote :

this website you linked up to mentions 1t as a metric performance of transistors,it mentios it as a key guideline.and you say amds trensistors are slower.
so if this pdf is correct :wink: and 1t is the key transistor performance metric.what is amds metric valu versus intels,i guess would be more appropriate than thinking 1T would be an optimal value.when it is apparently a form of measuring transistor speed.
i am reading and trying to ubderstand this at the same time.

Do you mean 1/t (with t being the gate delay)?

Reply to xsandman

Quote :

howmany picoseconds to a nanosecond,or vis versa?strange thing ive never heard of picosecond but i was thinking it was a segment of a second,and i am familiar with nanoseconds.

There are 1000 picoseonds in 1 nanosecond.

Microsecond 10^-6
Nanosecond 10^-9
Picosecond 10^-12
Femptosecond 10^-15

We will never see single digit femptosecond gate delays -- this is approaching the speed of light for a traveling electron through a lattice at atomic dimensions.

It is getting late ---

I cannot help but notice how much more productive this discussion is when, shall we say, nameless people are not in the way....

Have a good evening.

Jack

Of course we'll not reach such switching times in the future but I remember an experiment of some 2 years ago with light signals travelling 5 times faster than light itself in some noble gas (Helium or Neon or who knows) atmosphere. That certainly makes you dream alot!

Reply to m25

got to mention my partial ignorance in the field... what is that thing?

Reply to m25

Quote :

but as shrinkage increases leakage follows in a certain percent due to the shrinkage,so oxidation becomes a factor?
the ibm site stated that shrinkage increases gate leakage,un less i got dyslexic again and mis read it :wink:

You are confusing surface area and gate oxide thickenss shrinking the lateral dimension does not increase leakage, shrinking the thickness does due to quantum tunnelling.

Jack

Yeah, we need to amke sure we're talking about shrinking the node or shrinking the oxide thickness. The oxide thickness usually does not change that much, especially between processes. The node sizes are always trying to shrink. But if i remember correctly there are some other things in a die shrink that due increase leakage, but generally there is less leakage in a shrink.

Reply to xsandman

Quote :

thats gotta be painful for amd

Not necessarily; if after Conroe Intel will still sitting on their behind they'll go nowhere further. They've had this superior technology 4 years before AMD but made no superior products. In a programmed society like the one we live in, good will & hard work still prove to be the driving forces.

Reply to m25

Quote :

but as shrinkage increases leakage follows in a certain percent due to the shrinkage,so oxidation becomes a factor?
the ibm site stated that shrinkage increases gate leakage,un less i got dyslexic again and mis read it :wink:

You are confusing surface area and gate oxide thickenss shrinking the lateral dimension does not increase leakage, shrinking the thickness does due to quantum tunnelling.

Jack

Yeah, we need to amke sure we're talking about shrinking the node or shrinking the oxide thickness. The oxide thickness usually does not change that much, especially between processes. The node sizes are always trying to shrink. But if i remember correctly there are some other things in a die shrink that due increase leakage, but generally there is less leakage in a shrink.

This is not quite correct. The 90nm to 65 nm transistion was the first time in the history of the industry that Intel did not scale the oxide thickness. Link: http://www.semiconductor.com/resou [...] mber=13507

You can see the progression of oxide thickness scaling at 130, 90 and 65 nm nodes in my go-to summary table here:
http://www.realworldtech.com/page. [...] 01504&p=14
At 130 nm they were at 1.5 nm, at 90 nm they went to 1.2 nm (doesn't sound like much but it is actually a 20% scaling. At 180 nm I believe I recall Intel was at 2.0 nm I don't have a quick link for that sorry.

One thing to note from this table, is the Lg (gate length), Intel quotes and normally hits or exceeds the Lg, AMD quotes and normally misses their Lg at nominal conditions (again, a paper of I often link).
http://www.chipworks.com/resources [...] pworks.pdf

Jack

Ah, my bad, i thought Intel has been at the current thickness for a while. Thats why i am not a process expert.

Reply to xsandman

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32nm....what then?

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