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Frequencies, voltage and latency

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July 17, 2006 7:45:41 PM

I've been doing some shopping around for DDR2 lately and I've noticed something. It seems like for DDR2, as frequency rises latency rises also. Why is that? And how is it related to voltage?

I was just wandering around corsair's site and noticed that the PC4300 (533) seems to be able to pull 3-3-3-8 at 1.8v, but the 6400 (800) can only manage 4-4-4-12, and at 2.1v! The voltage increase I understand, but wouldn't higher frequency mean lower latency? As in, more cycles per second => less latency per cycle?
July 17, 2006 8:28:45 PM

Quote:
but wouldn't higher frequency mean lower latency? As in, more cycles per second => less latency per cycle?


No, unfortunately :-)
DRAMs have quite fixed timing needed to access the selected cells: you can increase quite easily the rate at which data are transferred, but not the time needed to activate the Row or the Column.
I'll make an example taking into account the CL (CAS Latency, the first number) only because it's usually the most relevant timing.

I'll write down the REAL frequencies (divided by two) because for example 533MHz is the Data Rate only, but the real DRAM clock is 266MHz.

PC4300 CL3:
266MHz is 3.75ns
so 3.75ns x 3 (CL) = 11.75ns

PC6400 CL4:
400MHz is 2.5ns
so 2.5ns x 4 (CL) = 10ns

As you can see the latencies are similar and in this case a little tight for the
faster module, but in general the CAS Latency for DDR-2 RAMs is between 12-15ns (10-12ns for very good OCes modules)
July 17, 2006 9:25:04 PM

Quote:
I've been doing some shopping around for DDR2 lately and I've noticed something. It seems like for DDR2, as frequency rises latency rises also. Why is that? And how is it related to voltage?

I was just wandering around corsair's site and noticed that the PC4300 (533) seems to be able to pull 3-3-3-8 at 1.8v, but the 6400 (800) can only manage 4-4-4-12, and at 2.1v! The voltage increase I understand, but wouldn't higher frequency mean lower latency? As in, more cycles per second => less latency per cycle?

Well, as maury mentioned, it's actually the case that latency is independent of the clock rate; it's going to be the same real-time speed in most cases. Hence, because a higher clock rate means less time per cycle, that means the latency, measured in CYCLES, increases.

As for voltage, it's just pretty much the case that any sort of chip may need more voltage at higher clock speeds, to compensate for increased dissipation (consumption) of power. Elsewise, if power isn't being supplied fast enough, they may "run dry," resulting in a pretty spectacular crash of your system.
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July 18, 2006 7:13:25 PM

but by your math right there, the higher frequency does lead to a lower latency :D  Just in a roundabout way. It does illustrate why the DDR2-800 is about the only ram that is beneficial for AMD though.
July 18, 2006 8:31:29 PM

Memory latency is most commonly quoted as memory access time, which is the time taken to satisfy a read request initiated by the processor. The average memory latency depends primarily on memory clock speed, application characteristics, and cache performance.

Folks tend to forget that memory chips are still integrated circuits. As such, they have a "switching time" that relates to readout and refresh. While it is certainly possible to engineer faster I/C's (they are available and used in more expensive modules), most of the recent design focus has been on density (or capacity per chip). So, many of the lower priced DDR2 memory modules are using slower speed memory chips to reduce cost and price. These tend to have the higher latency (and therefore, higher access times), so it's debatable as to the actual performance increases they offer over high quality DDR parts.

With a little research, you'll discover that DDR2 parts with higher rated speeds, and lower latency, are quite expensive.

Here is a truism that relates to computer memory (and most everything else):

Good fish ain't cheap, and cheap fish ain't good! :lol: 
July 18, 2006 9:23:45 PM

First of all I used the OCed CL attainable only by rising the DIMM supply voltages to dangerous values.
If you do the maths with stock latencies you'll find very different results and if you repeat the calculations for PC8000 you'll find bigger latency.
July 18, 2006 9:40:52 PM

Quote:
As such, they have a "switching time"


DRAM's latency has nothing to do with switching time: DRAM's logic switches in the order of hundreds of picoseconds, at least 5 times faster than the clock speed.
Dynamic RAMs latencies is due to the fact that they don't have "static" logic to retain data, but use capacitance, that must be refreshed every time it's read and every 64ms of no access.
In order to read the level stored in a capacitor and avoid data corruption, you must transfer at least a small amount of charge to another smaller cap, then read and regenerate throught a differential amplifier.
The charge transfer requires time, a small time, but many times longer than a static Flip Flop switching, and the bigger is the RAM in terms of capacity, the bugger is the capacitance value.

At this time there is no standard DRAM chip that can be used in PC DIMM modules with tRC better than 50ns.
The tightest latency of tRC=20ns is only for Micron RLDRAM (Reduced Latency DRAM), used only for buffering in fast network equipment and video streaming, with maximum capacity of 588Mb (Megabit) per chip, DDR2-800 clock speed and costs 4 times a standard DRAM.
July 18, 2006 10:23:31 PM

Hi theaxemaster,
Don't forget, Hz means 'per second'.
Clearly then, the latency and speed in MHz are inversely proportional, so for whatever module rating (in nanoseconds) you can have speed, or timings, but not both... (simplistic I know, but true).
I have some Corsair 5-5-5-12 and you know what? I don't worry about it - I just take the 800MHz and the stability. I got them to run 4-4-4-10 @ 1.9V, but so what - big deal. Then the slightest O/C brings IRQ-less-than BlueScreens...
So I keep the default, which actually has some O/C headroom, and don't O/C it :^) Very stable (and cool)...
Now, if I could run 2.1V or 2.2V through them, things could be different (but I cannot).
The memory makers point out that these voltages (over 2V) are required for top performance and stability, and that the memory is rated for it no problem - but my mobo does not agree. (It is a shrine to Cool & Quiet, anyway) LoL
Regards
July 19, 2006 12:32:22 AM

Quote:
As such, they have a "switching time"


DRAM's latency has nothing to do with switching time: DRAM's logic switches in the order of hundreds of picoseconds, at least 5 times faster than the clock speed.
Dynamic RAMs latencies is due to the fact that they don't have "static" logic to retain data, but use capacitance, that must be refreshed every time it's read and every 64ms of no access.
In order to read the level stored in a capacitor and avoid data corruption, you must transfer at least a small amount of charge to another smaller cap, then read and regenerate throught a differential amplifier.
The charge transfer requires time, a small time, but many times longer than a static Flip Flop switching, and the bigger is the RAM in terms of capacity, the bugger is the capacitance value.

At this time there is no standard DRAM chip that can be used in PC DIMM modules with tRC better than 50ns.
The tightest latency of tRC=20ns is only for Micron RLDRAM (Reduced Latency DRAM), used only for buffering in fast network equipment and video streaming, with maximum capacity of 588Mb (Megabit) per chip, DDR2-800 clock speed and costs 4 times a standard DRAM.

If your haste to disprove my point, you didn't complete my statement. I said "switching time" that relates to readout and refresh. (note that I placed "switching time" in quotes.

My comments are certainly true and the point being made didn't need to delve into the switching time of an individual cell nor the specific architectural characteristics of a cell. In industry jargon, memory components are referred to as transistors. Here is a bit of an excerpt from a Micron paper speaking to the point I was making, notice the title.

Clever Architecture Instead of Faster Transistors

The speed of the DRAM memory cells themselves has increased only slightly over the years, and the column frequency (the rate at which the chip can access bit locations) of mainstream memory is unlikely to exceed 200 MHz before the end of the decade. The diagram below from Micron illustrates the challenge facing memory designers. The red line on the graph plots the relatively slow improvement in column frequency. On the yellow line are peak data rates for each of these devices, quite a dramatic contrast as memory architects come up with nonlinear improvements in the way memory cells are accessed. Since it's difficult for designers to make the memory cells much faster, higher performance must come from clever architectural improvements to the control logic surrounding the internal memory arrays.
July 19, 2006 4:18:25 PM

Quote:
If your haste to disprove my point, you didn't complete my statement


Absolutely not, I simply wrote what you probably meant in more clear manner, because speaking of switching times in that context is essentially wrong, even between quotes and you forgot the main parameter to column access, that is the data regeneration after reading, that has absolutely nothing to share with refresh.

And DRAM memories are not transistors cells, the transistors serve only the read/select/refresh purpouse, data are stored in capacitors, not with transistors flip flop.
!