Intel Tulsa MP Benchmarks (16 meg L3 cache)..? anybody...?

[the_vorlon]

Intel is claiming up to 100% performance improvement in the 4 and up CPU class servers (less impressive than it sounds given how bad the previous genration was)

These are still netburst based but have a 16 meg L3 cache in addition to the 2 megs of L2 each of the two cores has...

Has anybody seen any benchmarks yet?

 

[xsandman]

Intel is claiming up to 100% performance improvement in the 4 and up CPU class servers (less impressive than it sounds given how bad the previous genration was)

These are still netburst based but have a 16 meg L3 cache in addition to the 2 megs of L2 each of the two cores has...

Has anybody seen any benchmarks yet?

NO idea when benchmarks will be available, but with 16 megs of L3 cache, you can load complete memory blocks and full programs into the ram. You can run small programs without accessing the main memory! Netburst may be inefficient, but memory bandwitch wont be an issue!

Dont know if this will be really good, or if we'll be glad to see Netburst FINALLY gone, but it'll be interesting.

 

[JonathanDeane]

Might be interesting if they stuck that 16MB's on a Core 2 cpu lol

 

[1Tanker]

Intel is claiming up to 100% performance improvement in the 4 and up CPU class servers (less impressive than it sounds given how bad the previous genration was)

These are still netburst based but have a 16 meg L3 cache in addition to the 2 megs of L2 each of the two cores has...

Has anybody seen any benchmarks yet?

NO idea when benchmarks will be available, but with 16 megs of L3 cache, you can load complete memory blocks and full programs into the ram. You can run small programs without accessing the main memory! Netburst may be inefficient, but memory bandwitch wont be an issue!

Dont know if this will be really good, or if we'll be glad to see Netburst FINALLY gone, but it'll be interesting.Yeah, but with a TDP of 150 watts, there will be brownouts near every server farm.

 

[xsandman]

Intel is claiming up to 100% performance improvement in the 4 and up CPU class servers (less impressive than it sounds given how bad the previous genration was)

These are still netburst based but have a 16 meg L3 cache in addition to the 2 megs of L2 each of the two cores has...

Has anybody seen any benchmarks yet?

NO idea when benchmarks will be available, but with 16 megs of L3 cache, you can load complete memory blocks and full programs into the ram. You can run small programs without accessing the main memory! Netburst may be inefficient, but memory bandwitch wont be an issue!

Dont know if this will be really good, or if we'll be glad to see Netburst FINALLY gone, but it'll be interesting.Yeah, but with a TDP of 150 watts, there will be brownouts near every server farm.

I really dont think these are targetted for anyone with a weak heart. :lol:

 

[1Tanker]

Might be interesting if they stuck that 16MB's on a Core 2 cpu lol

Yeah, then they will be able to do Super PI 32M in 5:00.

 

[voxel]

Yeah, but with a TDP of 150 watts, there will be brownouts near every server farm.

That was my first thought. The current generation of Xeon's sound like jet engines with their fans and 700+ W power supplies. But then I read the Paxville has a TDP of 165 watts so Intel is slowly improving their power-to-performance ratio with the dead Netburst architecture.

 

[Itanium_Fanboi]

Might be interesting if they stuck that 16MB's on a Core 2 cpu lol

Conroe is not cache limited. Allendale processors with 2mb cache only takes a hit on performance by about 5-9%. Not bad though.

 

[akscottbot]

that appears to be benchmarks for Itanium processors. Tulsa is a Xeon MP.

 

[akscottbot]

Might be interesting if they stuck that 16MB's on a Core 2 cpu lol

Conroe is not cache limited. Allendale processors with 2mb cache only takes a hit on performance by about 5-9%. Not bad though.

Core 2 Duos aren't 'cache limited' because they all have dedicated 1066mhz fsb's (1333 for woodcrest) for each socket. Tulsa will share 667/800 mhz fsb's over 2 sockets. The OOO memory loads and smart L2 cache help Core 2, but wouldnt be enough if they ran off of 333/400 of bandwidth per socket, and still only had 2-4 mbs of cache, especially considering the cache coherency traffic between 4 sockets. That would basically be a Core 2 version of Paxvile (NetBurst), which is probably the least competitive Xeon to ever come out.