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AMD-65nm CPUs Show-up

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July 30, 2006 10:38:33 PM

Story: HERE
:lol: 

More about : amd 65nm cpus show

July 30, 2006 10:54:04 PM

Ha ha, gotta love those Babblefish type translations:

Quote:
But control of natural enemies in residential 3600+ meat, selling points in 35W. Conroe lower than doubled consumption, low price than residential 3800+ with 4x2 3800+ while pulse, ESS CPU characteristics are many people dream.


I gather the original was in Japanese?
July 30, 2006 10:56:01 PM

Quote:
Ha ha, gotta love those Babblefish type translations:

But control of natural enemies in residential 3600+ meat, selling points in 35W. Conroe lower than doubled consumption, low price than residential 3800+ with 4x2 3800+ while pulse, ESS CPU characteristics are many people dream.


I gather the original was in Japanese?

Chinese, actually. :lol: 
Related resources
July 30, 2006 11:02:42 PM

Brawwk! Poly want a cracker! :lol: 
July 30, 2006 11:08:56 PM

Quote:
Story: HERE
:lol: 



Because the largest system desgners and builders are in Taiwan, it figures that there would Chinese coverage of the ES' known to be out there and ready for qualification. I give Oct for K8L to start showing its head. Maybe Nov.

I'm wondering if the statement about L3 is true. If so, WOW. Intel has used the L3 strategy as a "perf enhancement" so it woul dbe interesting to see what woul dhappen if they did add the L3. I would guess that they could definitely use it to help with the latency issues with DDR2. Carefully constructed L3 would make AM2/Socket F run like CAS2 DDR 400 with the extra bandwidth.
July 30, 2006 11:32:56 PM

Whatever happened with reverse hyperthreading and exciting upcoming things from AMD sock puppet? :lol:  8)
July 30, 2006 11:49:29 PM

Quote:
Story: HERE
:lol: 



Because the largest system desgners and builders are in Taiwan, it figures that there would Chinese coverage of the ES' known to be out there and ready for qualification. I give Oct for K8L to start showing its head. Maybe Nov.

I'm wondering if the statement about L3 is true. If so, WOW. Intel has used the L3 strategy as a "perf enhancement" so it woul dbe interesting to see what woul dhappen if they did add the L3. I would guess that they could definitely use it to help with the latency issues with DDR2. Carefully constructed L3 would make AM2/Socket F run like CAS2 DDR 400 with the extra bandwidth.

Since when does Intel use L3 cache? Last time i checked, while Intel does have a VERY large cache, it is L2 and NOT L3. Quit spreading false information!
July 30, 2006 11:56:03 PM

Quote:
Story: HERE
:lol: 


I think it's just assumed they at least be sampling by now since they released their roadmap stating just that to THG and Anandtech a month or 2 ago. Fab36 is currently ramping up with 65nm on 300mm wafer's and we'll see the first volume in december which should help out with AMD's current chip shortage crisis.
July 30, 2006 11:57:40 PM

Quote:
Whatever happened with reverse hyperthreading and exciting upcoming things from AMD sock puppet? :lol:  8)


I don't know. Maybe it got sick of you and decided to not come around.
July 31, 2006 12:05:20 AM

Quote:
Story: HERE
:lol: 



Because the largest system desgners and builders are in Taiwan, it figures that there would Chinese coverage of the ES' known to be out there and ready for qualification. I give Oct for K8L to start showing its head. Maybe Nov.

I'm wondering if the statement about L3 is true. If so, WOW. Intel has used the L3 strategy as a "perf enhancement" so it woul dbe interesting to see what woul dhappen if they did add the L3. I would guess that they could definitely use it to help with the latency issues with DDR2. Carefully constructed L3 would make AM2/Socket F run like CAS2 DDR 400 with the extra bandwidth.

Since when does Intel use L3 cache? Last time i checked, while Intel does have a VERY large cache, it is L2 and NOT L3. Quit spreading false information!


Well, to start out recently, the Tulsa server chip has 16MB L3. pwned? naahh, just misled

Most Xeons series have had at least 1 chip with L3. Had they not used the shared cache there may have been L3 on the Conroe. One AMD chip - the K6 III - has already had L3 so it's not so far-fetched. 65 nm would let them put it on-die. DDR2 latencies have to be overcome somehow.

This would cost a little die but it would help with latency. Even 1MB would hide a lot of latency. Once latencies catch up this would improve perf even more.
July 31, 2006 12:07:47 AM

dreaming only gets you so far, time for action, man.
July 31, 2006 12:10:42 AM

Quote:
Story: HERE
:lol: 


Finally!
July 31, 2006 12:16:52 AM

Quote:
Whatever happened with reverse hyperthreading and exciting upcoming things from AMD sock puppet? :lol:  8)


I don't know. Maybe it got sick of you and decided to not come around.

I think he got sick of you giving AMD fans a bad name. :roll:
July 31, 2006 12:19:15 AM

Quote:


Well, to start out recently, the Tulsa server chip has 16MB L3. pwned? naahh, just misled

Most Xeons series have had at least 1 chip with L3. Had they not used the shared cache there may have been L3 on the Conroe. One AMD chip - the K6 III - has already had L3 so it's not so far-fetched. 65 nm would let them put it on-die. DDR2 latencies have to be overcome somehow.

This would cost a little die but it would help with latency. Even 1MB would hide a lot of latency. Once latencies catch up this would improve perf even more.


Correct, Tulsa uses L3 cache. Tulsa has not been released yet. Tulsa also has 16MB of L3 cache and this is for EXTREMELY high end MP servers.

All CURRENT Xeon and Desktop processors do NOT have ANY L3 cache as you make it sound. And Tulsa will be the ONLY chip (again for VERY expensive MP systems) that has an L3 cache.

Therefor Intel is NOT using an L3 strategy on ANY of the current products, and will NOT be using this strategy on ANY mainstream products ANYTIME soon.
July 31, 2006 12:43:15 AM

Quote:
Correct, Tulsa uses L3 cache. Tulsa has not been released yet. Tulsa also has 16MB of L3 cache and this is for EXTREMELY high end MP servers.

All CURRENT Xeon and Desktop processors do NOT have ANY L3 cache as you make it sound. And Tulsa will be the ONLY chip (again for VERY expensive MP systems) that has an L3 cache.

Therefor Intel is NOT using an L3 strategy on ANY of the current products, and will NOT be using this strategy on ANY mainstream products ANYTIME soon.


Just give up Xeon lines have always had at least one chip with L3. Google Xeon L3.
July 31, 2006 1:07:06 AM

Quote:
Correct, Tulsa uses L3 cache. Tulsa has not been released yet. Tulsa also has 16MB of L3 cache and this is for EXTREMELY high end MP servers.

All CURRENT Xeon and Desktop processors do NOT have ANY L3 cache as you make it sound. And Tulsa will be the ONLY chip (again for VERY expensive MP systems) that has an L3 cache.

Therefor Intel is NOT using an L3 strategy on ANY of the current products, and will NOT be using this strategy on ANY mainstream products ANYTIME soon.


Just give up Xeon lines have always had at least one chip with L3. Google Xeon L3.

This is STILL not a mainstream high volume product! Your argument that "Intel has used the L3 strategy as a "perf enhancement"" has no basis in the mainstream market. This is for exlusive processors only. Your point is moot.
July 31, 2006 1:11:08 AM

Quote:
Correct, Tulsa uses L3 cache. Tulsa has not been released yet. Tulsa also has 16MB of L3 cache and this is for EXTREMELY high end MP servers.

All CURRENT Xeon and Desktop processors do NOT have ANY L3 cache as you make it sound. And Tulsa will be the ONLY chip (again for VERY expensive MP systems) that has an L3 cache.

Therefor Intel is NOT using an L3 strategy on ANY of the current products, and will NOT be using this strategy on ANY mainstream products ANYTIME soon.


Just give up Xeon lines have always had at least one chip with L3. Google Xeon L3.




This is STILL not a mainstream high volume product! Your argument that "Intel has used the L3 strategy as a "perf enhancement"" has no basis in the mainstream market. This is for exlusive processors only. Your point is moot.


Dude you're like that dumb kid who doesn't give up. My point was that the link mentioned L3 I said it would help perf and Intel and AMD have used it. I didn't say anything about the market they were introduced in.

Get a life.
July 31, 2006 1:43:27 AM

Quote:
Story: HERE
:lol: 


Just a photo of a phototype processor.
July 31, 2006 2:02:27 AM

Quote:
Whatever happened with reverse hyperthreading and exciting upcoming things from AMD sock puppet? :lol:  8)


Not anymore, AMD is still feeling like a kitten kicked to the wall.
July 31, 2006 2:13:57 AM

Quote:
Story: HERE
:lol: 


Pretty packaging.... when it boots windows then get back to us.

Jack

I agree.

I can read Chinese.
The poster just tried to describe a prototype processor without any booting.
July 31, 2006 2:39:33 AM

According to that CAD render, AMD has put thier L3 cache all the way against the far left side of the die. Kinda dumb if it's supposed to be shared across both logic units.
July 31, 2006 3:01:52 AM

i think there was an extreme edition of the p4 befroe with l3 cache... maybe..
July 31, 2006 3:18:05 AM

Quote:
Story: HERE
:lol: 


Pretty packaging.... when it boots windows then get back to us.

Jack


It says ES. What do you want? Aren't you the one who posted the EDT, EVT schedule? They should be showing up in pics. Like I said I would expect to see K8L in ~Oct.
July 31, 2006 3:21:26 AM

Quote:
Whatever happened with reverse hyperthreading and exciting upcoming things from AMD sock puppet? :lol:  8)


Not anymore, AMD is still feeling like a kitten kicked to the wall.


So what you're saying is that I should down Intel like you down AMD because I happen to buy AMD?

OK!

Fortunately I won't hold Intel fully responsible for you.
July 31, 2006 3:50:10 AM

Quote:

Not anymore, AMD is still feeling like a kitten kicked to the wall.


If AMD is feeling like a kitten kicked to the wall I would hate to know what Intel must've felt for the past couple years when A64 was raping them. 8O
July 31, 2006 4:24:17 AM

Quote:

Not anymore, AMD is still feeling like a kitten kicked to the wall.


If AMD is feeling like a kitten kicked to the wall I would hate to know what Intel must've felt for the past couple years when A64 was raping them. 8O

I wouldn't say raping, would say a bit ahead. Both the k8 and the P4 were good platforms. K8 was ahead of the P4 for sure, but it never had the lead this great that the C2D has over AMD right now. Hopefully AMD has a good come back with there next CPU, which most likely won't be out until later next year some time.

But Jack is very correct. A picture is said to say a 1000 words. But this picture has only a few words coming to my mind. Does it even work or is this some PR spin from AMD again. At least Intel released some Benchmarks with theres. AMD is to tight lipped, which could only mean two things. It isn't even close to competing with C2D at it's current stage, or it's really good and they want to shock Intel just like they shocked them. I'm leaning more towards AMD having to fix some major issues before they let anyone actual show any benchmarks or a working copy to the public.
July 31, 2006 5:19:08 AM

Quote:
i think there was an extreme edition of the p4 befroe with l3 cache... maybe..
Yes, the Gallatin core Northwood P4EE @ 3.2/3.4GHz. They had 512k-L2 and 2MB-L3.
July 31, 2006 5:26:38 AM

Quote:

Not anymore, AMD is still feeling like a kitten kicked to the wall.


If AMD is feeling like a kitten kicked to the wall I would hate to know what Intel must've felt for the past couple years when A64 was raping them. 8O

After over two years of being kick around Intel is getting back the favor...

July 31, 2006 5:52:26 AM

Quote:

Not anymore, AMD is still feeling like a kitten kicked to the wall.


If AMD is feeling like a kitten kicked to the wall I would hate to know what Intel must've felt for the past couple years when A64 was raping them. 8O

I wouldn't say raping, would say a bit ahead. Both the k8 and the P4 were good platforms. K8 was ahead of the P4 for sure, but it never had the lead this great that the C2D has over AMD right now. Hopefully AMD has a good come back with there next CPU, which most likely won't be out until later next year some time.

That's not entirely true. On the low end price vs. perf, Intel could compete, but in terms of raw power, especially in the high end, AMD dominated every bit as much as Core 2 Duo currently destroys AMD64.
July 31, 2006 5:57:45 AM

Quote:
Story: HERE
:lol: 

finally!!
they are like.. at least a year behind intel on this 65nm thing.

now if we can just have some screenshots of working engineering sample under windows...
July 31, 2006 6:59:58 AM

dont for get p4 3.4 ee.
July 31, 2006 7:07:49 AM

Quote:
dont for get p4 3.4 ee.
Reread my post, that's what i said.
July 31, 2006 7:11:35 AM

Hi Jack
You are good with In-Stat aren't you? They seem to have AMD making the 65 nano transition in a cake walk
Oh, dont worry about yields either. I did the calcs for the first quarter.
8 million chips, from ~ 70k 200mm wafer starts, 208 ^2 mm/ die.
Take into account the standard 18% losses, and yields were about 85%. Not too shabby.
July 31, 2006 7:49:57 AM

That read more like an AMD PR spin with the AMD exec taking as many digs at Intel as possible. They didn't really provide much real info, just claiming that it would be easy to transition to 65nm. I would be more apt to believe it, if they actually showed that they were successfully producing 65nm product. The way that article read, it would seem that AMD just isn't in a hurry to make it. Because, they could do it much easier than Intel...

If it was true, why aren't they showing us anything?
July 31, 2006 9:39:52 AM

Quote:
Story: HERE
:lol: 



Because the largest system desgners and builders are in Taiwan, it figures that there would Chinese coverage of the ES' known to be out there and ready for qualification. I give Oct for K8L to start showing its head. Maybe Nov.

I'm wondering if the statement about L3 is true. If so, WOW. Intel has used the L3 strategy as a "perf enhancement" so it woul dbe interesting to see what woul dhappen if they did add the L3. I would guess that they could definitely use it to help with the latency issues with DDR2. Carefully constructed L3 would make AM2/Socket F run like CAS2 DDR 400 with the extra bandwidth.

The l3 cache is the k8l, the model shown was just a k8 with due shrink so no l3 yet....
July 31, 2006 10:22:22 AM

Quote:
i think there was an extreme edition of the p4 befroe with l3 cache... maybe..
Yes, the Gallatin core Northwood P4EE @ 3.2/3.4GHz. They had 512k-L2 and 2MB-L3.

Is my memory hazy or was that gallatin p4EE the best performing P4 clock for clock?
July 31, 2006 11:09:18 AM

Quote:
i think there was an extreme edition of the p4 befroe with l3 cache... maybe..
Yes, the Gallatin core Northwood P4EE @ 3.2/3.4GHz. They had 512k-L2 and 2MB-L3.

Is my memory hazy or was that gallatin p4EE the best performing P4 clock for clock?

I think your memory must be bad, no pentium 4 was good "clock-for-clock"
July 31, 2006 11:56:09 AM

Quote:
Hi Jack
You are good with In-Stat aren't you? They seem to have AMD making the 65 nano transition in a cake walk
Oh, dont worry about yields either. I did the calcs for the first quarter.
8 million chips, from ~ 70k 200mm wafer starts, 208 ^2 mm/ die.
Take into account the standard 18% losses, and yields were about 85%. Not too shabby.



Fab36 uses 300mm wafers. The guys from In-Stat and Mercury say the same thing I do. AMD is is great shape. They didn't need 65nm so why rush it? Now that they are well on the way, the old chips will be put out to pasture much quicker.

If they are doing 4200, 4600, 5000+ at Fab36, imagine how many more of them they can produce.
July 31, 2006 11:58:49 AM

Quote:
Story: HERE
:lol: 



Because the largest system desgners and builders are in Taiwan, it figures that there would Chinese coverage of the ES' known to be out there and ready for qualification. I give Oct for K8L to start showing its head. Maybe Nov.

I'm wondering if the statement about L3 is true. If so, WOW. Intel has used the L3 strategy as a "perf enhancement" so it woul dbe interesting to see what woul dhappen if they did add the L3. I would guess that they could definitely use it to help with the latency issues with DDR2. Carefully constructed L3 would make AM2/Socket F run like CAS2 DDR 400 with the extra bandwidth.

The l3 cache is the k8l, the model shown was just a k8 with due shrink so no l3 yet....


I know K8L has L3 but the site with the pics mentioned smething about it in terms of Brisbane. I said that would help hide DDR2 latency.
July 31, 2006 12:03:02 PM

Quote:
i think there was an extreme edition of the p4 befroe with l3 cache... maybe..
Yes, the Gallatin core Northwood P4EE @ 3.2/3.4GHz. They had 512k-L2 and 2MB-L3.

Is my memory hazy or was that gallatin p4EE the best performing P4 clock for clock?Yes it was, especially the 3.46 GHz EE . These were basically Xeons.

Quote:
The 3.46GHz CPU is based on the Gallatin core and is basically a Xeon with a 1066MHz (4 x 266MHz) FSB sold as a Pentium4. This was a bit surprising as the Gallatin is based on the older Northwood core and not the newer 0.90nm Prescott core that is used by all new Pentium4 CPUs. Besides the FSB speed bump, this CPU being an Extreme Edition, features 2MB of L3 cache which is over and above the L1 and L2 caches found is standard Pentium4 CPUs. Like most new CPUs by Intel, the 3.46GHz EE is packaged in an LGA775 format.


http://www.tbreak.com/reviews/article.php?cat=cpu&id=35...
July 31, 2006 12:06:50 PM

Quote:
Is my memory hazy or was that gallatin p4EE the best performing P4 clock for clock?

Quote:

I think your memory must be bad, no pentium 4 was good "clock-for-clock"
I think your eyes must be bad, as he said "the best performing P4 clock for clock."
July 31, 2006 12:08:37 PM

Quote:
That read more like an AMD PR spin with the AMD exec taking as many digs at Intel as possible. They didn't really provide much real info, just claiming that it would be easy to transition to 65nm. I would be more apt to believe it, if they actually showed that they were successfully producing 65nm product. The way that article read, it would seem that AMD just isn't in a hurry to make it. Because, they could do it much easier than Intel...

If it was true, why aren't they showing us anything?



Those were market researchers with no ties to either company. Intel doesn't have as many friends as AMD does.

Yet another one of my opinions. That seems to be borne out in interviews like this.
July 31, 2006 12:33:09 PM

Quote:
Those were market researchers with no ties to either company. Intel doesn't have as many friends as AMD does.
Make up your mind. Are they nonbiased researchers with no ties to either company, or are they friends of AMD? Now the cats out of the bag!! You really would get farther ahead if you kept your mouth shut. You're like a gossipy old lady.
July 31, 2006 12:34:56 PM

You're such a tosser.
July 31, 2006 1:31:14 PM

Quote:
i think there was an extreme edition of the p4 befroe with l3 cache... maybe..
Yes, the Gallatin core Northwood P4EE @ 3.2/3.4GHz. They had 512k-L2 and 2MB-L3.

Is my memory hazy or was that gallatin p4EE the best performing P4 clock for clock?

I think your memory must be bad, no pentium 4 was good "clock-for-clock"

Perhaps i worded it wrong, it was the best pentium 4 in clock speed - performance ratio terms. I also think that Northwood was easily the best p4 core.
July 31, 2006 2:16:40 PM

Quote:
That read more like an AMD PR spin with the AMD exec taking as many digs at Intel as possible. They didn't really provide much real info, just claiming that it would be easy to transition to 65nm. I would be more apt to believe it, if they actually showed that they were successfully producing 65nm product. The way that article read, it would seem that AMD just isn't in a hurry to make it. Because, they could do it much easier than Intel...

If it was true, why aren't they showing us anything?



Those were market researchers with no ties to either company. Intel doesn't have as many friends as AMD does.

Yet another one of my opinions. That seems to be borne out in interviews like this.

Explains alot, your opinions and beliefs are formed on biased information and if the information does not suit your internal agenda, you completely disregard it regardless of what the facts are... :roll:
You are a natural FanBoi at its basic elementals! Congrats!
July 31, 2006 2:44:01 PM

Quote:
That read more like an AMD PR spin with the AMD exec taking as many digs at Intel as possible. They didn't really provide much real info, just claiming that it would be easy to transition to 65nm. I would be more apt to believe it, if they actually showed that they were successfully producing 65nm product. The way that article read, it would seem that AMD just isn't in a hurry to make it. Because, they could do it much easier than Intel...

If it was true, why aren't they showing us anything?



Those were market researchers with no ties to either company. Intel doesn't have as many friends as AMD does.

Yet another one of my opinions. That seems to be borne out in interviews like this.

Explains alot, your opinions and beliefs are formed on biased information and if the information does not suit your internal agenda, you completely disregard it regardless of what the facts are... :roll:
You are a natural FanBoi at its basic elementals! Congrats!



Those were market researchers with no ties to either company.
July 31, 2006 3:43:28 PM

Sorry for hijacking this thread, but i have a question that i need answering.

What exactly is cache thrashing?
July 31, 2006 4:00:45 PM

Quote:
Sorry for hijacking this thread, but i have a question that i need answering.

What exactly is cache thrashing?


I believe its a condition where data is going in and out of the cache very fast and some of it is conflicting so the CPU has to sort it out or something :)  pretty much the result of bad programming I would guess ? hmmm or maybe the cache is trying to load up data for different programs from system ram and in swapping in and out it floods the cache ? Although I hear Intel has a very good "smart cache" prefetch system so its rare ? (as you can see I have as many questions as you lol)
!