INTEL's Front Side Bus

intel will adopt a hypertransport based bus in the ner future (but not hypertransport as this is patented by amd and its partners)... however i readd somewhere on the net that like a few years ago the two signed an agreement that enbled them to use each others technologies. i think :roll:
also intel, will, and will have to adopt a integrated memory conroler in the die, although with conroe intel developed highly eficent prefetchers and improved latency without the need for an on die memory controller. 8)
this means that when intel does include a integrated memory controller in the cpu the results should be astounding, as long as intel dont mess up the core microarcheteure lile netburst.  

As long as they don't screw it up like AMD did with the socet AM2.

I'll just keep my fingers crossed and hope that they fix that issue with the release of the new socet AM2 Athlon x2 5200+ due before the end of this year. That's what im saving my money for, but if that issues not fixed im buying the x2 4800+ when newegg finally lowers the price to the correct price of $305 or lower

Intel will have few options past 2010 unless they develop their own IMC. Also, Intel has already stated that they are developing their own flavor of Hypertransport called CSI. I just hope they are not as poorly implemented as EMT64 and the Pentium D...



What issue with the AM2 are you referring to? Please explain...

I beleve he is refurring to the performance issue with the integrated memory controller and DDR2 ram as expained in toms reviews of the AM2 chips AMD reinvents itself