Sign in with
Sign up | Sign in
Your question

Next Gen AMD Dual core

Last response: in CPUs
Share
September 11, 2006 11:24:35 PM

Does anybody know if there will be a Dual Core version of the next AMD cpu.
with 2 of the cores disabled

and would it likley be a better overclocker, being designed to keep twice the cores cool?

More about : gen amd dual core

September 11, 2006 11:42:46 PM

Quote:
Does anybody know if there will be a Dual Core version of the next AMD cpu.
with 2 of the cores disabled

and would it likley be a better overclocker, being designed to keep twice the cores cool?


how would it run if both of the cores are disabled? 0 cores working = no CPU

If you mean like a quad core with only 2 cores running, neither intel or AMD would ever do that... unless there is some kind of screw up in supply.
September 11, 2006 11:57:23 PM

Quote:
Does anybody know if there will be a Dual Core version of the next AMD cpu.
with 2 of the cores disabled

and would it likley be a better overclocker, being designed to keep twice the cores cool?


K8L will be dual core, but I believe frst it will be mobile. The code name is BullDozer.

Linkage!
Related resources
September 12, 2006 12:15:35 AM

And today, Pigs Fly into Airplanes.
September 12, 2006 2:23:48 AM

There will be DC variations of K8L but they are not QC rejects. There will supposedly be tri-core chips with 1 failed core.
September 12, 2006 5:32:48 AM

That makes no sense at all. Wheres the link?
September 12, 2006 5:42:17 AM

Well that actually does makes some sense, why throw away 3 working cores when you can sell em ? Yields will probably be low to start especially with the need for all 4 to work. Partial failures could still make them some money this way.

Wonder what they would call them ?
Tri64 ? X3 ? 64Trio ?

Edit: I was writing as you posted doh
September 12, 2006 6:13:13 AM

methinks the more likely scenario would be:
make 4 cores
1 fails
disable failed core + 1 other
sell it as a Dual core

It's just the same as:
Make big cache
some fails
disable half
sell it as celery/sempron

Make many-pipeline GPU
some fail
disable some
sell it as a lower-specced GPU

the PS3 is/will be doing this too, but they have 8 cores and are disabling 1.




and although:
make 3 cores
1 fails
disable it
sell as dual-core
does make sense if the failure rate is high, methinks they'd rather spend time and effort getting the yields up than wasting time trying to wangle in another core (I've done some digital microelectronic design, and while essentially you can 'duplicate' cores, it is a bit more complicated than just copy/paste, eg if the 3 cores are in a line, clock skew would be majorly different if the two working cores were adjacent compared to on opposite ends)



My question is this: If this scenario happens to CPUs as it already does to GPUs, will it be possible at some point in the future to "unlock" working-but-disabled cores, just like people do with GPU pipelines? (of course, that implies being able to tell which cores are the working ones)
September 12, 2006 6:19:01 AM

Hardware modding the cpu you mean ? Be nice if we could do it like when you could unlock the multipliers with a stencil. I doubt they will make it that easy though. They test them before they are packaged and could package accordingly to make this impossible.
As fas as disabling a working core why would they do that ?
I am sure you could get more for 3 working cores then a dual core. A multi tiered approach works well in retail like this market, they could price them between the quads and duals and fill another niche without being forced to lower quad prices to fill the gap.
September 12, 2006 6:27:38 AM

That has been SOP for AMD for some time.
For most of the time they have been making dual cores, they have been making single cores with the same masks. Mind you, not all single core chips have a bad core along side of it. Many have fully functional second cores, that are just not connected to the pins.
The chips that have been coming out of fab 36 is true single core chips, as they had thier 90 nano mask made that way.
BTW, they have historicly used the same mask for server and mobile chips as well. That way the fab can just pump out a single product.
The use is decided @ binning.
September 12, 2006 6:57:14 AM

My bad. :oops: 

Can't beleive I didn't think of that. Kinda misread his post as well(thought there were only 3 cores, instead of 4 with only 3 working but one of those switched off). Must be all the work. Damn the work for having a sport day on friday, makes the monday and tuesday just so much worse.
September 12, 2006 10:13:00 AM

After I read Jack's post I reread K8's and it all made sense.
September 12, 2006 11:01:08 AM

Quote:


probably direct connect issues or something,maybe the asymmetry would be hard to manage.


nah... THG did a test using a dualcore and a singlecore running on the same board as three cores. Worked fine.
September 12, 2006 11:35:05 AM

If they do sell them like that (quad with 1 bad and 1 disabled core), how will it stack up against the native DC cpu's. There has to be native DC cpu's coz how many are actually gonna have bad cores?
September 12, 2006 11:39:43 AM

Quote:
That makes no sense at all. Wheres the link?


Yes it does --- the K8L core logic is just that a core, when you design one it is effectively copy/paste 3 times to make a quad. For a dual core it is just one copy paste .... not quite that simple but not complicated either. I believe Dailytech has reported DC variants of K8L --- if I run across the link I will let you know.

However tri core is different, it does in fact make sense. If defectivity is such that one core comes out dead at the end of the manufacturing process, but the other three are alive -- it is as simply as simply telling the Bios to initialize 3 cores instead of 4, at least I would think --- I could be wrong. cxl is a good authority on architecture in this regard, he may be able to be of more help.

Jack


I already provided a link. Should I provide one that says the Quad will be for FX only?
You sound like one of those people who gets no respect in the real world and comes here to live it down.
September 12, 2006 12:00:15 PM

Once again you don't even understand your own link. Classic.
September 12, 2006 12:41:34 PM

Quote:


probably direct connect issues or something,maybe the asymmetry would be hard to manage.


nah... THG did a test using a dualcore and a singlecore running on the same board as three cores. Worked fine.


Actually, they tested a dual core and a single core together in a dual processor board, yes; but the resulting setup was not terribly stable. It crashed during many tests. Great idea, but not nearly as successful as the Athlon MPs were at mixing different CPUs on a board. As similar as the three cores were, they were not the same, and it caused issues.

Something tells me though that a single IC with three working identical cores could possibly be very effective. The Xenon chip works fine (aside from heat issues) with a three-in-a-row design. It appears that K8L is likely to have a crossbar down the middle, and two on each side. Such a design could possibly keep the latencies equal, and therefore eliminate a lot of the problems of a multicore design.
a c 99 à CPUs
September 12, 2006 12:46:22 PM

From what I understand, AMD has four masks for non-mobile CPUs:

1. 90nm single-core with 512KB L2: Athlon 64 (disabled L2 = Sempron)
2. 90nm single-core with 1MB L2: Athlon 64 1MB, Athlon 64 FX, Opteron single-cores
3. 90nm dual-core with 512KB L2: Athlon 64 X2
4. 90nm dual-core with 1MB L2: Athlon 64 X2, Athlon 64 FX, Opteron

I do know that AMD has separate masks for the 512KB and 1MB L2 parts in an effort to cram more of them on a wafer. (So does Intel with the 4MB L2 Conroes and 2MB L2 Allendales.) I'd think if they went to that trouble to make the separate masks AND they are expanding like mad to meet demand that they don't throw out perfectly good dual cores as singles and waste half of the wafer in the process. A few parts have failed L2 cache (Semprons and a handful of 512KB units) and a failed core, but 95% of the time a part that is made passes QC and works fully.
September 12, 2006 3:16:56 PM

Quote:
Does anybody know if there will be a Dual Core version of the next AMD cpu.
with 2 of the cores disabled


I think it would be possible with K8L if the core yields are bad.
September 12, 2006 6:49:10 PM

Quote:


Actually, they tested a dual core and a single core together in a dual processor board, yes; but the resulting setup was not terribly stable. It crashed during many tests. Great idea, but not nearly as successful as the Athlon MPs were at mixing different CPUs on a board. As similar as the three cores were, they were not the same, and it caused issues.

Something tells me though that a single IC with three working identical cores could possibly be very effective. The Xenon chip works fine (aside from heat issues) with a three-in-a-row design. It appears that K8L is likely to have a crossbar down the middle, and two on each side. Such a design could possibly keep the latencies equal, and therefore eliminate a lot of the problems of a multicore design.


Yep, it´s been a while since i read the article, but i remember the glitches you mentioned. What i ment to say was, that a three processor setup wasn´t planned, yet it almost worked. So if they decide to go three cores, it doesn´t seem to be a big problem to make it work.

As to the Xeons,...
well, since they sync over the FSB it seems making them work is a lot easier than the IMC-ridden K8s.

And if they really use the crossbar you mentioned it maybe as easy as disabling a core. :?:

But as i said, i´m no expert. :lol: 
September 13, 2006 11:57:24 PM

Quote:
That makes no sense at all. Wheres the link?


Yes it does --- the K8L core logic is just that a core, when you design one it is effectively copy/paste 3 times to make a quad. For a dual core it is just one copy paste .... not quite that simple but not complicated either. I believe Dailytech has reported DC variants of K8L --- if I run across the link I will let you know.

However tri core is different, it does in fact make sense. If defectivity is such that one core comes out dead at the end of the manufacturing process, but the other three are alive -- it is as simply as simply telling the Bios to initialize 3 cores instead of 4, at least I would think --- I could be wrong. cxl is a good authority on architecture in this regard, he may be able to be of more help.

Jack

Why would only one core be defective, the defective silicon would be more of less localized would it not?
September 14, 2006 12:22:26 AM

Quote:
Once again you don't even understand your own link. Classic.


The link is to laptop logic where they talk about A DUAL CORE VERSION OF K8L FOR MOBILE!

Maybe the shrooms are getting the better of you.
September 14, 2006 12:30:19 AM

Quote:
That makes no sense at all. Wheres the link?


Yes it does --- the K8L core logic is just that a core, when you design one it is effectively copy/paste 3 times to make a quad. For a dual core it is just one copy paste .... not quite that simple but not complicated either. I believe Dailytech has reported DC variants of K8L --- if I run across the link I will let you know.

However tri core is different, it does in fact make sense. If defectivity is such that one core comes out dead at the end of the manufacturing process, but the other three are alive -- it is as simply as simply telling the Bios to initialize 3 cores instead of 4, at least I would think --- I could be wrong. cxl is a good authority on architecture in this regard, he may be able to be of more help.

Jack


I already provided a link. Should I provide one that says the Quad will be for FX only?
You sound like one of those people who gets no respect in the real world and comes here to live it down.

Projecting much? The same could be applied to you.
September 14, 2006 12:46:43 AM

Quote:
That makes no sense at all. Wheres the link?


Yes it does --- the K8L core logic is just that a core, when you design one it is effectively copy/paste 3 times to make a quad. For a dual core it is just one copy paste .... not quite that simple but not complicated either. I believe Dailytech has reported DC variants of K8L --- if I run across the link I will let you know.

However tri core is different, it does in fact make sense. If defectivity is such that one core comes out dead at the end of the manufacturing process, but the other three are alive -- it is as simply as simply telling the Bios to initialize 3 cores instead of 4, at least I would think --- I could be wrong. cxl is a good authority on architecture in this regard, he may be able to be of more help.

Jack


I already provided a link. Should I provide one that says the Quad will be for FX only?
You sound like one of those people who gets no respect in the real world and comes here to live it down.

Projecting much? The same could be applied to you.

Perhaps, depending upon your point of view. I have made it clear that I believe AMD and Intel should be treated as equals.

PERIOD!!!

AMD invented X64, Intel invented X32.
September 14, 2006 12:57:35 AM

Quote:
I have made it clear that I believe AMD and Intel should be treated as equals.


I'll hold you to that.
September 14, 2006 2:01:57 AM

Quote:
I have made it clear that I believe AMD and Intel should be treated as equals.


I'll hold you to that.

Disclaimer:

The AMD lawsuit may take care of that. Even though it's their second one and they're 1 for 2. So far. Maybe Intel can cover some more bills.
September 14, 2006 3:57:30 AM

Well if you want to be on your way to recovery, you gotta stop looking at Intel like they eat babies and rape women. Its a company. They all do this kind of thing. if AMD had 80% market share, we would be doing the absolute inverse.
these are corparations thats business is business. they have to report back to shareholders, not us.
If AMD was on top any of their dirty dealings would be our talking points.
The ninja is watching... be good
September 14, 2006 5:19:58 AM

OOOOO, the ownage :twisted: :twisted: :twisted:

Baron, I'm typing slow because I know you cannot read fast: Get a life and stop posting nonsense like that
September 14, 2006 6:51:38 AM

Quote:
I do know that AMD has separate masks for the 512KB and 1MB L2 parts

Last I heard
Quote:
In the new 90nm model of the Athlon 64 with Winchester core, half of the L2 cache is deactivated; the production process for the chips is identical to that of the larger variants.

link
On the other hand, Amd clains to have
Quote:
Our yield rate is very high compared with the competition. Right now we're in the same ballpark as the top chip manufacturers. We don't want to reveal details

that would be around 80%. Considering thier wafer usage, and chip output, each chip would need to use about 200mm^2. That would be consistant with using a single mask.
My numbers are for Q1/06. I believe that fab 36 is using a single core mask. This has more to do with risk than anything else. Amd thought that the initial yields would be too low, if they tried with a dual core mask.
September 14, 2006 6:18:24 PM

AMD released the first x86-64 and I think may have invented it. I will have to find a link if need be. There were other 64 bit cpu out there but they don't run on the same x86 code or however you would put it. Windows would not have run on IA-64. IA-64 is what intel was pushing for to do away with x-86 based cpu's. But anything that was programed for windows (or windows for that fact)would not run on a IA-64 or IA-32 but could have been emulated. x-86 emulation on IA-64 is on the slow side.
September 14, 2006 7:32:51 PM

Quote:
Nobody knows how these new processors will perform, but it would behoove AMD to release an underperforming architecture so it is safe to assume most likley that it will at the minimum meet and probably exceed the C2D architectural performance.


????????????

be·hoove
Pronunciation: bi-'hüv, bE-
Function: verb
Inflected Form(s): be·hooved; be·hoov·ing
Etymology: Middle English behoven, from Old English behOfian, from behOf
transitive verb : to be necessary, proper, or advantageous for <it behooves us to go>
intransitive verb : to be necessary, fit, or proper
September 14, 2006 8:01:51 PM

Quote:
if you can prove x86 64 is an amd invention ,then i will recant my assertion.


http://en.wikipedia.org/wiki/AMD64

"AMD's x86-64 instruction set (later renamed AMD64) is an extension of Intel's IA-32 (x86-32) architecture, created as an alternative to Intel and Hewlett Packard's radically different IA-64 architecture which has received a relatively cool market reception in many market sectors, and which was protected from cloning by a number of patents."


From wiki link you provided.

AMD developed the AMD64 extension, not invented it.
September 14, 2006 8:48:54 PM

further proof that post count has nothing to do with maturity.
September 15, 2006 12:56:14 AM

Quote:
That makes no sense at all. Wheres the link?


Yes it does --- the K8L core logic is just that a core, when you design one it is effectively copy/paste 3 times to make a quad. For a dual core it is just one copy paste .... not quite that simple but not complicated either. I believe Dailytech has reported DC variants of K8L --- if I run across the link I will let you know.

However tri core is different, it does in fact make sense. If defectivity is such that one core comes out dead at the end of the manufacturing process, but the other three are alive -- it is as simply as simply telling the Bios to initialize 3 cores instead of 4, at least I would think --- I could be wrong. cxl is a good authority on architecture in this regard, he may be able to be of more help.

Jack


I already provided a link. Should I provide one that says the Quad will be for FX only?
You sound like one of those people who gets no respect in the real world and comes here to live it down.

Projecting much? The same could be applied to you.

Perhaps, depending upon your point of view. I have made it clear that I believe AMD and Intel should be treated as equals.

PERIOD!!!

AMD invented X64, Intel invented X32.

You mean AMD extended x86-32 to x86-64, and Intel extended x86-8 to x86-16 to x86-32.
September 15, 2006 2:04:49 AM

Quote:
well until you have proof youre kinda blowing smoke,what i posted is fact.and it proves intel was first to the server market with 64.amd did not invent they changed 64 bit to be a desktop feature.thats hardly an invention.

if you can prove x86 64 is an amd invention ,then i will recant my assertion.



http://pedia.nodeworks.com/A/AM/AMD/AMD64/

Quote:
The AMD64 or x86-64 or x64 is a 64-bit processor architecture invented by AMD. It is a superset of the x86 architecture, which it natively supports. The AMD64 Instruction set is currently used in AMD's Athlon 64, Athlon 64 FX, and Opteron processors.
Intel has also implemented the AMD64 architecture in its newer Xeon and Pentium 4 F processor lines, rebranding it EM64T.


http://news.com.com/A+payoff+on+AMDs+64-bit+bet/2008-10...

Quote:
It wasn't just inventing the new instruction set architecture, AMD64, but we also had to invent HyperTransport and develop onboard memory controllers.


http://open-encyclopedia.com/AMD64

Quote:
The AMD64 is a 64-bit processor architecture invented by AMD. It is a superset of the x86 architecture, which it natively supports. The x86-64 Instruction set is currently used in AMD's Athlon 64, Athlon 64-FX, and Opteron Processors.


http://news.com.com/Intel+reveals+new+64-bit+server+chi...

Quote:
Intel, meanwhile, resisted the 64-bit x86 move, trying to spur the market for its new 64-bit Itanium architecture. Itanium is not directly compatible with today's x86 software, but it can run such programs through a slower emulation mode.


Intel invented the IA-64 Itanium architecture and AMD Invented the x86-64 architecture. Also it AMD to use the first x86-64 processors not Intel. IA-64 was here first but the two are not the same even if they are both 64bit and AMD did invent x86-64.

verndewd will this get a recall on your assertion. :p 
September 15, 2006 3:33:31 AM

mips is not x86 though. AMD created the 64bit version as intel had tried to do and failed. Saying that they only extended it is like saying C++ only extended C which it did in a way but is really a totally new language its just backwards compatible same as x86 64bit is new but backwards compatible. I dont believe it was said that AMD created the first 64 bit cpu but rather the first x86 64 bit cpu which is a big difference. Server 64 bit cpus are a totally different subject.
September 15, 2006 4:44:26 AM

Quote:


It wasn't just inventing the new instruction set architecture, AMD64, but we also had to invent HyperTransport and develop onboard memory controllers.


P

The statement that AMD developed the Onboard Memory Controller is not true. Intel did that with their Timna project back in 1999 and 2000. It also included onboard graphics. Unfortunately they paired the chip with RDRAM which was extremely expensive which was later found out to be caused by a Cabal of Memory Vendors artificially keeping the price high. Intel had designed the processor to be an entry level processor with good performance. The sticking point was that no system vendors thought there was a market for a highly integrated Processor that used the most expensive memory around at the time and so Intel killed it off.

I got to play with one of these chip and it was quite a performer for its time.
September 15, 2006 6:37:20 AM

The way I see it is that AMD64 was just a case of cover your butt. Intel wanted to move the market to IA64, to loose all the legacy crap that holds x86 back. That would have left Amd out in the cold. It would have been years of legal wrangling before intel would be forced to cough up a license.
On the other hand, for HT, AMD is the consortium. They led, pushed and pulled the standard, because they wanted the ISA.
For ODMC, others tried, but AMD put it together in a way that works. At the end of the day, that is what an invention is.
September 15, 2006 8:49:25 AM

Quote:
I belive you make a good point, while I cannot go back in time and read the mind of the Intel CEO's and technical decision makers. I do suspect that IA-64 was first compiled with the concept of replacing x86 in the long term, AMD's approach was to cut this off at the pass.

cxl and I had a lengthy discussion on this where I learned something I had a misconception on. I would enjoy hearing his inputs.
Jack


With growing reputation of Opteron / Athlon64,
AMD might want to add more extensions to AMD64.(as shown in the roadmap)
September 15, 2006 12:27:34 PM

Quote:
Intel extended x86-8 to x86-16

I have to correct you on this. There is no 8bit x86 CPU yet. The first x86 CPU was 8086 and it was 16bit with 16bit bus. Latter the 8088 came with 8 bit bus, but it was 16bit also.
September 15, 2006 2:57:27 PM

Quote:
Intel extended x86-8 to x86-16

I have to correct you on this. There is no 8bit x86 CPU yet. The first x86 CPU was 8086 and it was 16bit with 16bit bus. Latter the 8088 came with 8 bit bus, but it was 16bit also.
Hey, let's not forget the Intel 4004, which had 12 bit addresses (4Kbyte data memory) and 4 bit data bus :lol:  :lol:  :lol: 
September 16, 2006 4:26:06 AM

Yea I remember my 8088, I pimped it out with a nice addon board for some expanded memory. How about windows 3.0 with a nice speedy 286 ? Those were the days. I still keep a p2-300 around for running dos games and shit.
September 16, 2006 7:33:33 AM

Quote:
They have already alluded to that, and one of the prime reasons I believe AMD did what they did --- extend the x86 ISA another generation. It sorta helps put them in the driver's seat for a change. Brilliant if you ask me, and if that is how they were thinking it through.
Jack


Let's guess what is going to be added next? :D 

Memory Ceiling of 4GB - fixed.
What is the next thing?
September 16, 2006 8:01:14 AM

Quote:

id like to see ddr 2 latency continue to shrink,and if they could get thatmemory controller to run ddr2 like intels fsb is running that would be nice.they are doing above 500mhz.


So I think AMD would not adopt DDR3 early :) 
September 16, 2006 8:59:40 AM

know this may be rediculously late and silly, but it is in reply to the pigs will fly into airplanes post...

i have seen a gaggle of geese on the ground run into an cessna 182 on takeoff, and let me tell you, the skydiving students inside that had never been in a plane before needed to change their underwear after that...

so depending on your definition of flight, pigs might be able to collide with planes in the air...

and also be much better for grilling
September 16, 2006 2:19:46 PM

Neither architecture is bandwidth starved, the p4 was starved...couldnt get enough to feed that long pipeline. Core 2 and k8 have all the bandwidth they can use. Amd just cant ramp up speeds enough to compete with the more efficient core2. So more bandwidth is not gonna help k8 here although they could improve their memory controller some. Lower latencies help but the memory is the limiting factor there for the most part.

Gonna have to wait for the k8l for a chance to compete with core2 for efficiency.
September 16, 2006 5:46:51 PM

Quote:
They have already alluded to that, and one of the prime reasons I believe AMD did what they did --- extend the x86 ISA another generation. It sorta helps put them in the driver's seat for a change. Brilliant if you ask me, and if that is how they were thinking it through.
Jack


Let's guess what is going to be added next? :D 

Memory Ceiling of 4GB - fixed.
What is the next thing?

Parallelism.
September 17, 2006 5:13:43 AM

am2 is by and large a failure. The only real benefit is now everyone is on ddr2 but ddr3 is right around the corner so what benefit is that really ?
Even higher latencies to contend with. We need something better.

Unless you get a top of the line am2 cpu and top notch memory you can actually see a decrease in performance. Thats sad.

Hopefully AM3 will fix that.
!