Next Gen AMD Dual core

notquitehere188

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Does anybody know if there will be a Dual Core version of the next AMD cpu.
with 2 of the cores disabled

and would it likley be a better overclocker, being designed to keep twice the cores cool?
 

buckiller

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Does anybody know if there will be a Dual Core version of the next AMD cpu.
with 2 of the cores disabled

and would it likley be a better overclocker, being designed to keep twice the cores cool?

how would it run if both of the cores are disabled? 0 cores working = no CPU

If you mean like a quad core with only 2 cores running, neither intel or AMD would ever do that... unless there is some kind of screw up in supply.
 

BaronMatrix

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Does anybody know if there will be a Dual Core version of the next AMD cpu.
with 2 of the cores disabled

and would it likley be a better overclocker, being designed to keep twice the cores cool?

K8L will be dual core, but I believe frst it will be mobile. The code name is BullDozer.

Linkage!
 

K8MAN

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There will be DC variations of K8L but they are not QC rejects. There will supposedly be tri-core chips with 1 failed core.
 

thelvyn

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Well that actually does makes some sense, why throw away 3 working cores when you can sell em ? Yields will probably be low to start especially with the need for all 4 to work. Partial failures could still make them some money this way.

Wonder what they would call them ?
Tri64 ? X3 ? 64Trio ?

Edit: I was writing as you posted doh
 

drcroubie

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methinks the more likely scenario would be:
make 4 cores
1 fails
disable failed core + 1 other
sell it as a Dual core

It's just the same as:
Make big cache
some fails
disable half
sell it as celery/sempron

Make many-pipeline GPU
some fail
disable some
sell it as a lower-specced GPU

the PS3 is/will be doing this too, but they have 8 cores and are disabling 1.




and although:
make 3 cores
1 fails
disable it
sell as dual-core
does make sense if the failure rate is high, methinks they'd rather spend time and effort getting the yields up than wasting time trying to wangle in another core (I've done some digital microelectronic design, and while essentially you can 'duplicate' cores, it is a bit more complicated than just copy/paste, eg if the 3 cores are in a line, clock skew would be majorly different if the two working cores were adjacent compared to on opposite ends)



My question is this: If this scenario happens to CPUs as it already does to GPUs, will it be possible at some point in the future to "unlock" working-but-disabled cores, just like people do with GPU pipelines? (of course, that implies being able to tell which cores are the working ones)
 

thelvyn

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Hardware modding the cpu you mean ? Be nice if we could do it like when you could unlock the multipliers with a stencil. I doubt they will make it that easy though. They test them before they are packaged and could package accordingly to make this impossible.
As fas as disabling a working core why would they do that ?
I am sure you could get more for 3 working cores then a dual core. A multi tiered approach works well in retail like this market, they could price them between the quads and duals and fill another niche without being forced to lower quad prices to fill the gap.
 

endyen

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That has been SOP for AMD for some time.
For most of the time they have been making dual cores, they have been making single cores with the same masks. Mind you, not all single core chips have a bad core along side of it. Many have fully functional second cores, that are just not connected to the pins.
The chips that have been coming out of fab 36 is true single core chips, as they had thier 90 nano mask made that way.
BTW, they have historicly used the same mask for server and mobile chips as well. That way the fab can just pump out a single product.
The use is decided @ binning.
 

Dade_0182

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My bad. :oops:

Can't beleive I didn't think of that. Kinda misread his post as well(thought there were only 3 cores, instead of 4 with only 3 working but one of those switched off). Must be all the work. Damn the work for having a sport day on friday, makes the monday and tuesday just so much worse.
 

Dade_0182

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If they do sell them like that (quad with 1 bad and 1 disabled core), how will it stack up against the native DC cpu's. There has to be native DC cpu's coz how many are actually gonna have bad cores?
 

BaronMatrix

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That makes no sense at all. Wheres the link?

Yes it does --- the K8L core logic is just that a core, when you design one it is effectively copy/paste 3 times to make a quad. For a dual core it is just one copy paste .... not quite that simple but not complicated either. I believe Dailytech has reported DC variants of K8L --- if I run across the link I will let you know.

However tri core is different, it does in fact make sense. If defectivity is such that one core comes out dead at the end of the manufacturing process, but the other three are alive -- it is as simply as simply telling the Bios to initialize 3 cores instead of 4, at least I would think --- I could be wrong. cxl is a good authority on architecture in this regard, he may be able to be of more help.

Jack


I already provided a link. Should I provide one that says the Quad will be for FX only?
You sound like one of those people who gets no respect in the real world and comes here to live it down.
 

cpburns

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probably direct connect issues or something,maybe the asymmetry would be hard to manage.

nah... THG did a test using a dualcore and a singlecore running on the same board as three cores. Worked fine.


Actually, they tested a dual core and a single core together in a dual processor board, yes; but the resulting setup was not terribly stable. It crashed during many tests. Great idea, but not nearly as successful as the Athlon MPs were at mixing different CPUs on a board. As similar as the three cores were, they were not the same, and it caused issues.

Something tells me though that a single IC with three working identical cores could possibly be very effective. The Xenon chip works fine (aside from heat issues) with a three-in-a-row design. It appears that K8L is likely to have a crossbar down the middle, and two on each side. Such a design could possibly keep the latencies equal, and therefore eliminate a lot of the problems of a multicore design.
 
From what I understand, AMD has four masks for non-mobile CPUs:

1. 90nm single-core with 512KB L2: Athlon 64 (disabled L2 = Sempron)
2. 90nm single-core with 1MB L2: Athlon 64 1MB, Athlon 64 FX, Opteron single-cores
3. 90nm dual-core with 512KB L2: Athlon 64 X2
4. 90nm dual-core with 1MB L2: Athlon 64 X2, Athlon 64 FX, Opteron

I do know that AMD has separate masks for the 512KB and 1MB L2 parts in an effort to cram more of them on a wafer. (So does Intel with the 4MB L2 Conroes and 2MB L2 Allendales.) I'd think if they went to that trouble to make the separate masks AND they are expanding like mad to meet demand that they don't throw out perfectly good dual cores as singles and waste half of the wafer in the process. A few parts have failed L2 cache (Semprons and a handful of 512KB units) and a failed core, but 95% of the time a part that is made passes QC and works fully.
 

Slobogob

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Actually, they tested a dual core and a single core together in a dual processor board, yes; but the resulting setup was not terribly stable. It crashed during many tests. Great idea, but not nearly as successful as the Athlon MPs were at mixing different CPUs on a board. As similar as the three cores were, they were not the same, and it caused issues.

Something tells me though that a single IC with three working identical cores could possibly be very effective. The Xenon chip works fine (aside from heat issues) with a three-in-a-row design. It appears that K8L is likely to have a crossbar down the middle, and two on each side. Such a design could possibly keep the latencies equal, and therefore eliminate a lot of the problems of a multicore design.

Yep, it´s been a while since i read the article, but i remember the glitches you mentioned. What i ment to say was, that a three processor setup wasn´t planned, yet it almost worked. So if they decide to go three cores, it doesn´t seem to be a big problem to make it work.

As to the Xeons,...
well, since they sync over the FSB it seems making them work is a lot easier than the IMC-ridden K8s.

And if they really use the crossbar you mentioned it maybe as easy as disabling a core. :?:

But as i said, i´m no expert. :lol:
 

spud

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That makes no sense at all. Wheres the link?

Yes it does --- the K8L core logic is just that a core, when you design one it is effectively copy/paste 3 times to make a quad. For a dual core it is just one copy paste .... not quite that simple but not complicated either. I believe Dailytech has reported DC variants of K8L --- if I run across the link I will let you know.

However tri core is different, it does in fact make sense. If defectivity is such that one core comes out dead at the end of the manufacturing process, but the other three are alive -- it is as simply as simply telling the Bios to initialize 3 cores instead of 4, at least I would think --- I could be wrong. cxl is a good authority on architecture in this regard, he may be able to be of more help.

Jack

Why would only one core be defective, the defective silicon would be more of less localized would it not?
 
That makes no sense at all. Wheres the link?

Yes it does --- the K8L core logic is just that a core, when you design one it is effectively copy/paste 3 times to make a quad. For a dual core it is just one copy paste .... not quite that simple but not complicated either. I believe Dailytech has reported DC variants of K8L --- if I run across the link I will let you know.

However tri core is different, it does in fact make sense. If defectivity is such that one core comes out dead at the end of the manufacturing process, but the other three are alive -- it is as simply as simply telling the Bios to initialize 3 cores instead of 4, at least I would think --- I could be wrong. cxl is a good authority on architecture in this regard, he may be able to be of more help.

Jack


I already provided a link. Should I provide one that says the Quad will be for FX only?
You sound like one of those people who gets no respect in the real world and comes here to live it down.

Projecting much? The same could be applied to you.
 

BaronMatrix

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That makes no sense at all. Wheres the link?

Yes it does --- the K8L core logic is just that a core, when you design one it is effectively copy/paste 3 times to make a quad. For a dual core it is just one copy paste .... not quite that simple but not complicated either. I believe Dailytech has reported DC variants of K8L --- if I run across the link I will let you know.

However tri core is different, it does in fact make sense. If defectivity is such that one core comes out dead at the end of the manufacturing process, but the other three are alive -- it is as simply as simply telling the Bios to initialize 3 cores instead of 4, at least I would think --- I could be wrong. cxl is a good authority on architecture in this regard, he may be able to be of more help.

Jack


I already provided a link. Should I provide one that says the Quad will be for FX only?
You sound like one of those people who gets no respect in the real world and comes here to live it down.

Projecting much? The same could be applied to you.

Perhaps, depending upon your point of view. I have made it clear that I believe AMD and Intel should be treated as equals.

PERIOD!!!

AMD invented X64, Intel invented X32.