Tom's Hardware > Forum > Motherboards & Memory > Memory > PC8500 versus PC4200 on Core 2 Duo architecture

PC8500 versus PC4200 on Core 2 Duo architecture

Forum Motherboards & Memory : Memory - PC8500 versus PC4200 on Core 2 Duo architecture

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grifonik   09-19-2006 at 08:12:35 PM

Non-overclocking scenario comparing PC4200 (533MHz) versus PC8500 (1066MHz)

So, from doing some research, I understand the ratio of mem speed to bus speed is fairly important for the Core 2 architecture so that memory run in sync with the bus generally performs than mem run async. If the PC4200 gives a 1/1 ratio at 3-3-3-8 timings and the PC8500 gives a 2/1 ratio at 5-5-5-15 timings, which is better/faster? (Remember, NOT OC'ing)

Also, if not OC'ing is it true that the PC8500 wouldn't even be used at that speed?

I can't seem to find any benchmarks on this. Help and knowledge greatly appreciated ! ! !

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Doughbuy   09-19-2006 at 08:52:10 PM
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First off, Imma say that most mobo's don't support anything above DDR2-800 right now... so anything above that would be a waste of money...

Second, I would say that the PC8500 would be faster just because its faster memory, nothing involving the dividers, but I may be wrong... And 2:1 dividers won't cause too much of a problem either me would think, but I've never been the best about memory timings and frequency...

I've seen some PC8500 reviews on the web, especially for Corsair and OCZ...

http://www.thinkcomputers.org/v2/i [...] ews&id=419

http://hardware.gamershell.com/art [...] 1024-8500/

There are more... google is your fried...

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Mondoman   09-19-2006 at 09:09:36 PM
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Remember that DDR2-533 run in dual-channel mode (which it should be) gives a doubled (1066MHz) effective data throughput.

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grifonik   09-19-2006 at 11:03:42 PM
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Friend found this... it really makes the case for sticking with 533...


http://www.xbitlabs.com/articles/m [...] guide.html

This poor performance of fast DDR2 SDRAM is due to the architecture of Core 2 Duo systems in which memory is connected to the CPU via the chipset and two sequential buses. In this design it is not the bandwidth of dual-channel high-frequency memory that becomes the bottleneck, but the Quad Pumped Bus that connects the CPU with the chipset's North Bridge. Its maximum theoretical bandwidth is 8.5GB/s in Core 2 Duo systems, which only equals the bandwidth of dual-channel DDR2-533 SDRAM. That's why we don't see a really big performance growth if we use memory faster than DDR2-533.

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