Sorry, J, the HT is a *separate* bus for all the non-memory I/O; memory has its own bus connected to the memory controllers built into the AMD CPU. That way, memory and e.g. SATA data I/O are not competing for bandwidth on the same bus to the CPU core. Intel CPUs (with off-CPU memory controllers) do have both memory and other I/O using the same FSB.
Having the memory controllers off-CPU is more flexible in that you can modify the CPU and the northbridge separately and more easily. That's why Intel CPUs could use DDR2 long before AMD; modifying a Northbridge to access DDR2 was a lot easier than modifying the CPU to access DDR2 and having to come out with a different CPU socket & design (i.e. AM2).
OTOH, having the memory controllers on-CPU can give better performance.