4S tests

Just thought these were intestersting if nothing else. Any thoughts? I don't have time to look up atm, but will Tigerton have an IMC? And if not, will it be bottlenecked at all by FSB? I imagine Tigerton will take the final performance crown away from AMD until K8L atleast.

Any thoughts?

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  1. Tigerton is the Xeon MP version of the Kentsfield (Cloverton) and thus will not have an IMC as the Kentsfield/Cloverton do not have one. It will use Intel's shared bus method, but rather than 1 bus shared among 4 chips, it will be two buses shared among 4 chips. I might be wrong about that- somebody feel free to correct me.

    Will it be bottlenecked by the FSB? For inter-CPU communication, the current Xeon MPs are, so I'd fancy a guess that the Tigerton would be too. Only benchmarking will tell for sure.
  2. Then with an independent FSB to each chip, the chips will be able to communicate to each other decently. RAM bandwidth may be at a premium, but it should be much, much better than the current Xeon MPs. And for the $64,000 question- will it beat the Opterons? I will say that in non-memory-intensive applications, it sure will, as well as in FP and integer performance. But anything that hammers the RAM will see the Opterons pull way ahead.
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