http://www.fabtech.org/content/view/2462/
The blog is written by Semiconductor Fabtech, Editor-in-Chief, Mark Osborne. He has been covering the semiconductor industry for over ten years. This area is intended to provide insight into topical stories of the time in a more informal manner.
Although Intel Corp. plans to start volume production at the 45nm node later this year, the leading-edge node for the rest of the CMOS logic community will be 65nm. This simple statement lays the foundation for a host of misconceptions about the 65nm node having been ‘cracked,' and that volume production at high yields is a given.
It may come as shock to some that the vast majority of chip manufacturers currently ramping 65nm processes - including some of the major foundries - have less than 50 percent yields!
This statement was issued by John Kispert, President and COO of KLA-Tencor. If anyone should have a good grasp of the bigger picture, it should be John Kispert, head of the largest supplier of metrology solutions in the industry.
The blog is written by Semiconductor Fabtech, Editor-in-Chief, Mark Osborne. He has been covering the semiconductor industry for over ten years. This area is intended to provide insight into topical stories of the time in a more informal manner.
Although Intel Corp. plans to start volume production at the 45nm node later this year, the leading-edge node for the rest of the CMOS logic community will be 65nm. This simple statement lays the foundation for a host of misconceptions about the 65nm node having been ‘cracked,' and that volume production at high yields is a given.
It may come as shock to some that the vast majority of chip manufacturers currently ramping 65nm processes - including some of the major foundries - have less than 50 percent yields!
This statement was issued by John Kispert, President and COO of KLA-Tencor. If anyone should have a good grasp of the bigger picture, it should be John Kispert, head of the largest supplier of metrology solutions in the industry.