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What's the bottleneck for a Core2Duo system?

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March 7, 2007 2:09:33 PM

OK, so here's my thoughts so far. If I'm wrong, please do tell me (but try to avoid needless abuse!)

The limiting factor on a seriously overclocked Core2Duo system is generally the bus between the memory and the CPU. If you're an OCing freak, it's a good idea to get a northbridge cooled mobo, like the Asus P5N32-SLI, which can hit 1800mhz+ for the northbridge. This would mean your ext clock could go as high as 450mhz, which means your memory (on a 1:1 divider) could go as high as 900mhz. It's doubtful whether a DDR2-533 or a DDR2-667 could manage this, however. A DDR2-800 probably could. And then it's even more doubtful whether an e6600 could do this at x9 (4050mhz is an extreme OC!). It probably could at x8 with a nice cooler (3600mhz).

This makes the e6400 + DDR2-800 memory a nice option. You could probably OC to 450mhz external clock and get 3600mhz with the northbridge running at 1800mhz.

But now I'm wondering if this is really true. Does the northbridge really constrain the CPU that much in real world apps/games? Theoretical maximums are all very well and good, but what is the real bottleneck in a core2duo system?
March 8, 2007 3:54:27 AM

The answer would be code-dependent and application-specific. At any moment, the performance bottleneck could be the core execution units (ideal), the memory cache (L1 and L2 on C2D), the memory controller going to RAM, or the physical disks. A robust caching system and prefetching algorithms are meant to minimize the impact of bottlenecks from slower memory.

Speaking of caches, there is also a cache within any modern Northbridge. An 800-MHz FSB does not necessarily bottleneck with RAM running at faster than 800 MHz. That's because DRAM operates with latencies - DRAM cannot sustain read or write operations on every clock cycle, so the Northbridge-RAM link operates with lower efficiency than the CPU-Northbridge FSB.

There are many forum people here who will tell you the FSB is not the bottleneck on C2D. They're mostly right - the FSB is usually far from saturated with RAM data, and there's not much else being sent across the FSB in a dual-core C2D system - graphics accounts for a small fraction of bandwidth, and other I/O is downright miniscule. But on multi-chip (current quad-cores) and multi-socket systems, the FSB also acts as the interconnect for cache coherency traffic, and I'm aware of quite a few scenarios where the FSB is the likely factor limiting performance. That is why current server boards feature faster FSBs than the typical desktop.
March 8, 2007 5:47:33 AM

5 series chips do not overclock the nb has no voltage options and even it it did it gets really hot

even after adding a fan cooled thermalright heat pipe cooler and artic sil to nb it still does not oc - some board wil most do not.

1200-1300max fsb for p5n series

the e series is 6 series chips that go much higher
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March 8, 2007 8:02:56 AM

Thanks for the replies.

DragonSpayer: I'm going on what the Striker can do, which is 1824 (http://tomshardware.co.uk/2006/12/21/680i-motherboard-c...), but even the old p5n32-e+ based on the 590i chipset could get 1600, so I don't quite see why you think there is a 1200-1300 max on the p5n series in general. Any links would be most welcome.

EDIt: Oh I see where I've gone wrong. I didn't specify P5N32-E in my original post. Sorry!

Wr: Thanks very much for this, but I fear you may have left me behind on a couple of points. What is cache coherency traffic? Is it restricted to server systems, or is there just more of it there than on single systems? But I take it that your overall point is that, because of latencies, RAM is not really going to clog the FSB, and so remains a bottleneck?
March 8, 2007 9:00:45 AM

The limiting factor for any top shelf gaming rig, and most computers for that matter, is the hard drives (and possible optical drives). It doesn't matter how fast your system is when it has to access drives for information. FSB bandwidth is 50x or more than what a hard drive will sustain for reads or writes. But I digress, this only effects you when information needed isn't already in the much faster RAM.
March 8, 2007 9:01:09 AM

Quote:

But now I'm wondering if this is really true. Does the northbridge really constrain the CPU that much in real world apps/games? Theoretical maximums are all very well and good, but what is the real bottleneck in a core2duo system?


No it doesnt! It's been proven over and over.
This is a server problem. If you have 2 Quad core CPU's sharing one bus then there is possibilities of bottlenecking.

FSB is a potential weak spot, but it's not a bottleneck for most......yet.
March 8, 2007 6:13:24 PM

Quote:
Wr: Thanks very much for this, but I fear you may have left me behind on a couple of points. What is cache coherency traffic? Is it restricted to server systems, or is there just more of it there than on single systems? But I take it that your overall point is that, because of latencies, RAM is not really going to clog the FSB, and so remains a bottleneck?


Cache coherency applies to any time multiple caches of the same level cache the same memory pool. You're right that L2 cache coherency traffic happens on all multisocket servers, but it also takes place on many multicore desktop systems with the exception of dual-core C2D's and Core Duos - these latter designs feature a unified L2 cache. While multi-core and multi-socket AMD systems require L2 cache coherency, it is generally not considered a problem because of low-latency interconnects (Direct Connect within a socket and Hypertransport between sockets).

What remains a potential cause for concern is Intel's reliance on a single FSB per socket to handle both memory and cache traffic. This happens whenever they package independent chips onto one socket (Pentium 4 dual-core and Core 2 quad-core) as well as in all their multisocket servers (Xeons). The degree of severity of the cache coherency bottleneck goes up as the number of different caches increases but can be lessened with good software threading - typically an emphasis in server applications.
March 8, 2007 8:33:18 PM

Intel enthusiasts.
:oops: 
March 8, 2007 9:39:22 PM

Thanks for your comment, BM. I'd like if it perhaps you'd say what you think the relevant bottleneck on AMD systems are, if you think the AMD vs Intel issue is actually relevant. I would certainly welcome your input.
March 8, 2007 10:18:48 PM

I think the AM2s cry if they don't have low latency RAM but that's just me.
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