For the next 2 weeks Benson, Brett and Jeff will be on-line to discuss the Core microarchitecture. As you all know, our latest dual and quad core microprocessors are based on the Core microarchitecture and are a vast improvement over the previous generation of Netburst designs. Brett, Jeff and I have spent the previous 8+ years in Intel's Desktop Microprocessor division working with customers and Intel's design team to define processor features, specifications and board designs. We are looking forward to discussing a wide range of hardware features here; everything from low power states for Energy Star, maximum and typical power dissipation levels, cache designs, temperature measurement and thermal monitoring, dual and quad core performance, front side bus vs. integrated memory controller, and pipelines to name a few. You may have also read some of the recent articles about our upcoming processors built on the 45 nanometer process. We can answer questions on those products too. (If you happen to be in Beijing, China next week you can attend IDF and ask one of our Principal Engineers all about the 45nm Core 2 processors).
Please keep in mind that we are hardware experts, not software, so questions on virtualization, security and multi-threading optimizations are outside of our realm.
The three of us are located in Oregon, on the West coast of the USA, and will be responding to your questions and comments on a daily basis.
If for some reason you have no questions for us, I'd be interested in your response to a couple of my own:
* What is more important, a processor having particular architecture features or a processor that has the best performance?
* How do you use information displayed by some hardware monitoring programs such as processor temperatures or voltages?
We looked at SMT on the Core uArch and found that the performance was not worth the power and transitor cost. However, with the new Nehalem archtecture we will once again have SMT.
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