What is a pipeline?

I was wondering, what exactly is a pipeline? I read this site a lot and I noticed that people always talk about the stages of the pipeline and how a lower staged pipeline is better. I read through wiki and I know that x86 is a combination of risc and cisc, but im not sure what happens at these stages. Can someone please explain how all the pieces of a cpu or gpu fit together to execute a command in all those stages?

Well I understand that much. But what do they mean by like 4 issue core and floating point unit? What happens along these stages? Why is a longer pipeling better for multimedia?

Well there must be advantages to having a longer one too. And how did they double the amount of stages for netburst? What are the extra stages they added and how does that allow a faster clockspeed?

They allow for extra clockspeed because each stage is doing less work so power is cut per stage.

They allow for extra clockspeed because each stage is doing less work so power is cut per stage.

Technically, it is gate delay that is decreased. Cutting the pipline up into more stages probably increases total power consumption of the entire pipeline, though I've not actually delved that deeply into pipeline theory.

That actually sounds right in that we know NetBurst should have been called HeatBurst. My point was that longer pipelines allow for greater clockspeed.

The first Netburst wasn't BAD, it was the overall goal of the design team that messed up the CPU. It seems major goal of Netburst was to increase clock speeds beyond conventional thinking. If they switched their goals to say, increase efficiency after Northwood core, Netburst based cores may be alive today.

They allow for extra clockspeed because each stage is doing less work so power is cut per stage.

Technically, it is gate delay that is decreased. Cutting the pipline up into more stages probably increases total power consumption of the entire pipeline, though I've not actually delved that deeply into pipeline theory.

That actually sounds right in that we know NetBurst should have been called HeatBurst. My point was that longer pipelines allow for greater clockspeed.

My point was that Intel's strategy wasn't necessarily that bad from the perspective of 2000, rather than today's hindsight where individuals such as yourself that obviously have no electronic design expertise are calling their architecture "heatburst". They made mistakes in not anticipating increases in device leakage and didn't properly consider the impact of inductance, which is dominant in high frequency parasitics. They didn't have crystal balls or years of experience with high frequency circuits. There was some degree of incompetence on their part, but there was also a measure of bad luck too. In any case, the guys that dreamed up "heatburst" are an order of magnitude more intelligent than you are, so don't be so quick to condemn their stupidity.


In your terms intelligence is subjective. I have created test harness scripting languages base don XML and .Net. Those designers haven't done that. You brought up excessive power consumption from the extra stages - even admitting that "You don't know JACK". NetBurst bore out your statements. You're the messenger shoot yourself.

Actually, I didn't say I don't know jack, although someone that doesn't appreciate the details of the subject might come to that conclusion. A longer pipeline is most likely going to create an overhead, increasing the transistor count in the design. More logic should use more power. I was just CMAing because I don't design pipelines for a living and haven't run a power analysis tool on one, much less the number that would be necessary to understand the functionality in detail. However, I most certainly understand the governing concepts well enough.

As to your intelligence, it appears that you're a one trick monkey, as you aren't able to pick up much of anything concerning microarchitectures even though you seem to have an unhealthy interest.

Geees,

Baron explained it quite well I think (in the beginning anyways), but you people just seem to be looking for whatever reason to trashtalk him and wordfuck his posts.

If you wanna flame him for whatever moronic things he said in other topics, then why not do it in other topics?

Childish.

I think "heatburst" is a pretty funny (and fitting) name for a pretty failed architecture. Jokes are allowed here right?

Baron,

Intelligence is neither subjective nor objective, rather it is a term used to describe a persons capacity to reason, comprehend, rationalize, analyze and conclude as a means or aptitude for grasping truth --- none of which you can do.... you are no authority on intelligence and should not attempt to speak on the subject. It is through intelligence that inables one to arrive at an objective conclusion -- which we all know you cannot do.

Need it remind you: http://www.apa.org/journals/features/psp7761121.pdf
A study has been done related directly to you... perhaps if you were aware you would improve.

I am embarrassed for you.

Jack


I know you are but what am I? Do you really think I can't see through you?

...harsh. The link is an interesting read.

Yeah, harsh === but over the course of 5000+ posts, I saw that it fit Baron to a 'T'.


I'm not harsh, just egotistical.

in m y humble opinion, in internet therms, you're doing the same by flaming him back

and Jack: thx for the link , It will be a interested read :>

I guess you did't read Wombat's sig. Why have one woman when I can have 100?

Actually, I didn't say I don't know jack, although someone that doesn't appreciate the details of the subject might come to that conclusion. A longer pipeline is most likely going to create an overhead, increasing the transistor count in the design. More logic should use more power. I was just CMAing because I don't design pipelines for a living and haven't run a power analysis tool on one, much less the number that would be necessary to understand the functionality in detail. However, I most certainly understand the governing concepts well enough.

As to your intelligence, it appears that you're a one trick monkey, as you aren't able to pick up much of anything concerning microarchitectures even though you seem to have an unhealthy interest.


I used to be the CPU white paper king. But now I only read programming books and white papers.

Do you want to talk about multiple interfaces or generics or COM Interop. Thats my business and I admit it.

Well, it appears that you wasted a lot of your time reading those CPU white papers, because you obviously didn't learn anything.

CPU architecture is only vaguely related to my job. I work more at the device level with layout extraction, parastic extraction and device models. The technologies I mostly work on are RF(Si & SiGe) and Power oriented, but I have done some work on low power CMOS and SOI technologies. CPU architecture isn't even #2 on my list, as I have broad interest in most science, particularly neurobiology, evolution/genetics, evolutionary algorithms, climate, economics and nutrition.

Instead of making lame excuses for your lapses and arguing with Jack about whether you were right or wrong, why don't you try and actually learn something about a subject you seem to care about?

His response in this topic showed that he has less understanding of the subject than the original poster. I corrected him because he was completely wrong regarding the basic concept of a pipeline.

"Heatburst" is getting old, especially when used by someone who doesn't even after the fact understand why P4 failed, but thinks the designers are morons for not seeing the error of their ways ahead of time. We don't talk this way about AMD design engineers. We say they are in a tough position and are being undermined by their management. We should give the guys at Intel the same measure of respect.