Best Pic of Barcelona I have seen yet...

[RichPLS]

This is looking good to me...

A picture is worth a thousand words...

Another Linq

 

[mpjesse]

Harpertown looks like 2 dual cores pasted together. Is that right? I thought Harpertown/Penryn was supposed to be native quad core. Or is Harpertown 2 quad cores pasted together?

*confused*

 

[Tostino]

Harpertown looks like 2 dual cores pasted together. Is that right? I thought Harpertown/Penryn was supposed to be native quad core. Or is Harpertown 2 quad cores pasted together?

*confused*

Harpertown is just a 45nm shrink of Clovertown.
Not native quad.

 

[weskurtz81]

When is harpertown due to be e-tailed?

wes

 

[Grimmy]

Gawd... this is almost like porn.

Staring at those naked cores.

Shame on us.

8O . o O (wow look at the cache on those babys)

:lol:

 

[baligavinod]

ya i know...too long has AMD bragged abt so called "native" quad core and done nothing.

 

[SuperFly03]

You're sick. :tongue:

Native QC, pasted 2 DC, who cares? I sure as hell don't as long as it can put down some good benchies.

 

[Grimmy]

. o O (sorry)

Ya, my mind was in the gutter that time...

Just couldn't think of anything funnier to say, but wanted to say something.. :lol:

edit:

But I did stared at it for a long time...

 

[SuperFly03]

whoa look at the rack of sram on that baby :lol: It was funny.

Wow.... we need to find some better way to spend our time besides starring at the racks of SRAM on a proc that doesn't exist.... lol.

 

[darious00777]

Gawd... this is almost like porn.

Staring at those naked cores.

Shame on us.

8O . o O (wow look at the cache on those babys)

:lol:

I'm liking the way that pink on Harper looks. :twisted:

 

[tehrobzorz]

rofl....

 

[Valdis]

pentium d 162mm2
athlon x2 199mm^2

whoops, die size didnt do it this time! what a stupid marketing garbage :!:

 

[turpit]

Harpertown looks like 2 dual cores pasted together. Is that right? I thought Harpertown/Penryn was supposed to be native quad core. Or is Harpertown 2 quad cores pasted together?

*confused*

I cant beleive you! If your going to spread tripe, at least use proper phrasology! The correct term is "glued", note "pasted! Jeesh :roll:
:lol: :lol:

Sorry Jesse, couldnt resist

 

[Viperabyss]

i think grimmy is right look at the cache (not like a perv this time)
compare the processor stuff that is not the cache to the far left picture
hmm...

humm...
it strikes me a single Barcelona core is considerably smaller than Clovertown, even Penryn @ 45nm...

maybe the scaling of the picture?

 

[mpjesse]

*mpjesse stabs turpit with a butter knife*

 

[Viperabyss]

huh?
barcelona is 283mm and
clovertown is 286mm
and penryn is 214mm

maybe i dont get what you are saying

but from what it looks like to me its obvious the intel procs are using way smaller transistors that the amd proc
and with the 45nm high k dialectric
hmm...

well what i mean is, the one logic core area for Barcelona seems to me is a lot smaller than Clovertown's one logic core.
sorry about the confusion.

 

[turpit]

*mpjesse stabs turpit with a butter knife*

:lol: :lol: :lol: :lol:

Could have been worse.......could have been a spoon.

 

[mitch074]

Looking at the core designs a bit closely, you'll notice that, on one hand, the Barcelona core is also a dual 2-cores pasted together - but surrounded by the integrated memory controller, with shared 2MB L3 cache on top of the dedicated 512 Kb of cache per core. Intel calls it '4Mb cache', but it doesn't relate well with their designs since in their CPUs each 'dual core' can't communicate with the other without going through the FSB.
On Barcelona, all 4 cores have shared access to the same 2 Mb L3 cache though the IMC. Said L3 cache is planned, as far as I know, to reach sizes of 2, 4 and 8 Mb. On the other hand, the L2 cache on AMD cpus ever since the K7 is closely linked to the L1 data cache.
As such, we have here two radically different designs and transistor count cannot be used as a direct comparison measurement.

Any thoughts?

 

[Gh0stDrag0n]

A even better pic! :twisted:

 

[mitch074]

Since AMD has developped all its CPU since the K7 with a crossbar system (in the K7's case however, it was always stuck on a single core), you may even say that in AMD's case, the Barcelona is 4 cores glued together with a mean, fast 'traffic light' giving each of them access to the L3 cache and RAM...
Is it more to your liking when said this way?

 

[Joe_The_Dragon]

Looking at the core designs a bit closely, you'll notice that, on one hand, the Barcelona core is also a dual 2-cores pasted together - but surrounded by the integrated memory controller, with shared 2MB L3 cache on top of the dedicated 512 Kb of cache per core. Intel calls it '4Mb cache', but it doesn't relate well with their designs since in their CPUs each 'dual core' can't communicate with the other without going through the FSB.
On Barcelona, all 4 cores have shared access to the same 2 Mb L3 cache though the IMC. Said L3 cache is planned, as far as I know, to reach sizes of 2, 4 and 8 Mb. On the other hand, the L2 cache on AMD cpus ever since the K7 is closely linked to the L1 data cache.
As such, we have here two radically different designs and transistor count cannot be used as a direct comparison measurement.

Any thoughts?

Also the integrated memory controller reduces the need for cache.
where as the dual dual-core needs it to help with the dual core to dual core over the FSB and cpu to chipset traffic.

 

[BaronMatrix]

Harpertown looks like 2 dual cores pasted together. Is that right? I thought Harpertown/Penryn was supposed to be native quad core. Or is Harpertown 2 quad cores pasted together?

*confused*

Native doesn't come until Nehalem. There are supposedly some improvements in Penryn though.

 

[Ranman68k]

What would be interesting is if the thingy on the far right decisively trumps the thingy on the far left .... then perhaps all this "Native" mumbo jumbo will go away

If a native quad core was a bunch of mumbo jumbo, I don't think Intel would be pursuing it.

 

[balister]

What would be interesting is if the thingy on the far right decisively trumps the thingy on the far left .... then perhaps all this "Native" mumbo jumbo will go away

If a native quad core was a bunch of mumbo jumbo, I don't think Intel would be pursuing it.

The only reason I can potentially see is their yields are so high on 45nm that it would cost more to make the connections between the two dual core packages than it would to create a monolithic design. It's pretty obvious that creating the links between two dual core packages is very effective, I can only see a reason for monolithic if it ends up being cheaper to manufacture (which I'm not sure how since if one core is bad on the monolithic die, the die is bad).

 

[jaffa]

AMD die size is an estimate based on publicly available sources not actual measurements. Intel die sizes are based on actual measurements.

^ From the small print on the diagram.

Peeps,

Forgive me on this one, but i noticed that no one else had mentioned this! I had a little giggle!