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The truth about AMD Benchmarks - Page 2

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June 13, 2007 1:40:16 PM

Baron... Hiding behind a new identity isn't going to cut it. And selectively cutting out phrases from an article that is linked (for a change) just isn't going to cut it.

Make a point, back it up, and then move on.
June 13, 2007 1:47:37 PM

Quote:
Baron... Hiding behind a new identity isn't going to cut it. And selectively cutting out phrases from an article that is linked (for a change) just isn't going to cut it.

Make a point, back it up, and then move on.



:?:
a c 143 à CPUs
a b À AMD
a c 148 V Motherboard
June 13, 2007 1:52:21 PM

...or the "threat" that there will be competition. No matter what Barcelona actually does, you can bet Intel isn't sitting on its thumbs. They will continue to develop new tech, and today's high-end will keep getting pushed down into tomorrow's mainstream. Intel as a monolithic entity has no need to fear someone as small as AMD, but individuals within it I'm sure worry at night. They're judged over mere 0.1% market share changes that might happen on their watch, so they stay busy, cranking out improvements.

My current box is AMD. The previous one was Intel. Prior to that it was AMD. The next one will almost certainly be Intel. I'd love an excuse to buy AMD, but that's only because about the only valid one I'd accept is that price/performance will be better; right now that doesn't look likely. We'll see. We'll all see, sooner or later.
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June 13, 2007 2:12:34 PM

1) Power6 is a RISC architectural design, design dependent that alone with SOI could mean it could only scale to 4.7GHz while in theory it could scale way beyond if it wasn't built using SOI, we just don't know. Until IBM enters the x86 space with a SOI chip, we can only go be hear-say from engineers about SOI and AMD having scaling issues with there chip architecture.

2) Lets remember Barcelona/Agena is K10. AMD scrapped the entire K9 project in favor of K10. Since only AMD knows why and how far along the K9 development was, it could have been disastrous timing for them to have scrapped it then buy ATi.

Ask yourselves, Do you want Barcelona now? or Do you want Barcelona to come out the way its intended too?
I for one want it to come out the way its intended too, and if that means I have to wait till Christmas then so be it, atleast we'll be getting the product promised to us, and if it flops then there is no excuse at all, it just wasn't up to snuff. I firmly believe investors and the media pressure on AMD is what forced them to release R600 before they were ready too, and because of it they couldn't deliver as promised, and lost face in the impatient enthusiast market. Radical, new, and different designs, have a lot of quirks and bugs. These problems take time to iron out, and in the case of R600 it needs amazing software/drivers to make it efficient because of what it has going on inside. Besides AMD is less focused on the upper enthusiast level of things right now, they are more concerned with mainstream, low-end, and server space, Fusion and the R600 stream processing cards are prime evidence of this.

In either case, Intel and ATi are going with a multi-core approach to the Graphics market. After Barcelona/Agena is out AMD is taking the Intel approach and "gluing" 2 K10's together for 8-core CPU.
June 13, 2007 2:48:51 PM

Quote:
1) Power6 is a RISC architectural design, design dependent that alone with SOI could mean it could only scale to 4.7GHz while in theory it could scale way beyond if it wasn't built using SOI, we just don't know. Until IBM enters the x86 space with a SOI chip, we can only go be hear-say from engineers about SOI and AMD having scaling issues with there chip architecture.
...


x86 CPU's have a very close RISC resembling internal micro op code architecture. The basic principles of transistor are the same whether SOI or bulk silicon technology is used. x86 or RISC has nothing to do with it. But if you presume RISC architecture generates shorter interconnects you are wrong again, they use the same logic circuitry on both risc or x86 (CISC) CPU's...
June 13, 2007 2:58:18 PM

Quote:
1) Power6 is a RISC architectural design, design dependent that alone with SOI could mean it could only scale to 4.7GHz while in theory it could scale way beyond if it wasn't built using SOI, we just don't know. Until IBM enters the x86 space with a SOI chip, we can only go be hear-say from engineers about SOI and AMD having scaling issues with there chip architecture.
...


x86 CPU's have a very close RISC resembling internal micro op code architecture. The basic principles of transistor are the same whether SOI or bulk silicon technology is used. x86 or RISC has nothing to do with it. But if you presume RISC architecture generates shorter interconnects you are wrong again, they use the same logic circuitry on both risc or x86 (CISC) CPU's...

Huh...???? One of us doesn't understand the concept of a cpu...
June 13, 2007 4:09:50 PM

Quote:
1) Power6 is a RISC architectural design, design dependent that alone with SOI could mean it could only scale to 4.7GHz while in theory it could scale way beyond if it wasn't built using SOI, we just don't know. Until IBM enters the x86 space with a SOI chip, we can only go be hear-say from engineers about SOI and AMD having scaling issues with there chip architecture.
...


x86 CPU's have a very close RISC resembling internal micro op code architecture. The basic principles of transistor are the same whether SOI or bulk silicon technology is used. x86 or RISC has nothing to do with it. But if you presume RISC architecture generates shorter interconnects you are wrong again, they use the same logic circuitry on both risc or x86 (CISC) CPU's...


I'll take your word for it i am by no means an engineer, I was under the assumption there was more to a chips speed then just the IPC length and transistors, but like i said i am not an engineer. So i will listen to you :wink:
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