I heard the big advantage the core2duos have over the althon 64 X2's range is that they talk to eachother over their cache, while the X2's comunicate with eachother using teh FSB. That is what gives the core2duos so much advanatge.
So I was wondering, for a 4200+ athlon 64 x2.
Would:
2.2gig = 11x 200mhz (stock)
actually be slower than
2.2gig = 8x 266mhz
Im just curious, because if Im guessing right that means the cores can communicate faster with the latter, and even though they are pretty much at teh same frequency it should work better, am I right?
Yeah, you got it backwards. AMD's X2's talk to each other on the CPU itself, so at whatever clockspeed the CPU operates at. So in a X2 4800 the two cores talk to each other at 2.5GHz. In a Core 2 Duo E6600, the two cores talk over a 1.07GHz FSB. (1066MHz) That's why high FSB's for Intel CPU's help so much. And don't forget that AMD's memory controller is built into the CPU operating at the CPU's speed. That's why C2D need all the memory bandwith they can get.
I'm not picking a side on which is better, just explaining the two different architectures to the best of my knowledge. (I could be wrong)
I heard the big advantage the core2duos have over the althon 64 X2's range is that they talk to eachother over their cache, while the X2's comunicate with eachother using teh FSB
you got it exactly the wrong way round.
X2's can talk to each other directly, all current Intel CPU's need to go through the FSB (which as a previous poster posted, runs at 1066 MHz)
The real reason the C2d is faster is because its a newer and better design. Its slightly held back by its fsb and lack of an integrated memory controller, but overall its just newer and better. integrated memory controller means there is no middle man in the memory hierarchy basically.
its much better at floating point calculations (decimal basically), which gives it a massive advantage.
the latest core 2 duo's are a proper dual core and have no need for the FSB. it is only when they slap 2 cores on one socket that they need the FSB. the need for the fast speeds of the FSB is for bandwidth purposes. they need to make sure as much data can get to the CPU as quick as possible. that is why they have such large caches so as to make use of their advanced prefetch abilites. means it relies on the FSB speeds less than it might need to.
TBH, i am not sure if the 2 cores on an AMD can talk to each other as fast the core runs.
So, the core2duos run over the FSB so as it gets higher and higher they get faster and faster at sharing, ok.
No. The C2D can talk to each other directly - as in, they share the same L2 cache. Sync'ing takes place directly too.
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Another question. A bit harder, this one is.
What I heard with the core2quads(ex: q6600) was that they are like, 2x e6600's.
And how it was made came to me as if it was a e6600 connected like over the cache, and 2 of those that communicated over the FSB.
Essentially true; the C2Q slaps two C2D in a single package, the way the P4D did. As such, the C2Q does benefit from higher FSB speeds and would really enjoy an IMC.
AMD's design since the K7 was to make L2 cache an extension of the L1-Data cache, and then communicate with the memory controller through a crossbar system (in the K7, the crossbar was always talking to a single core, but the K7 design was basically dual-core ready). This crossbar system got used in the K8-X2; the UMC for this crossbar system can talk to any UMC it can find over any bus there is; this bus can either be on the motherboard, or inside the silicon.
In short, if Barcelona was actually nothing more than 2 K8-X2 slapped together, it would still be more efficient than Intel's current C2Q design. However, they could also expand the crossbar system so as to talk not to 2, but 4 cores 'before' going through the IMC (which would then take care of L3 cache, system RAM and other CPUs on the platform).
JumpingJack would probably correct me or give more precisions, however I hear he's gone MIA.
hmm, hatman, no offense but can you quit the knee jerk stuff. one, i posted that they didn't go through the FSB and yet you still posted this
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So, the core2duos run over the FSB so as it gets higher and higher they get faster and faster at sharing, ok.
did you even read all the posts?
also, you are simplifying things far too much.
most people only increase the FSB for overclokcing purposes for synching with the ram. however, as there are very few multihreaded progrmas(unless you do encoding and the like) you will not see much benefit unless there is actually data to share between the cores and even then how much benefit you get i am unsure of. increasing the speed that the CPU runs at itself may lead to more improvement
you may want to post a question regarding this over in the overclocking section.
if you do not understand the simple stuff, then having a plan like you do may not be the best idea. for a quad core you probably are waiting for the price cuts. i suggest between ow and 22nd of july you look through all the previous threads regarding overclocking the FSB and the results.
I don't think everyone here grasps what the difference between a Core 2 Duo and Core 2 Quad is. Yeah, naturally, it's a quad core Core 2, but there's more to it than that. If you put "Presler" in google image search you'll see what the Pentium D 900 looks like - two completely independent and separate pieces of silicon, two Pentium 4s, in a multi-chip-module (MCM).
The Core 2 Duo is a single chip, both cores share 4MB of cache, and talk to each other directly. The Core 2 Quad is a pair of such chips, on an MCM, like Presler. So you've got two 4MB caches, with a pair of cores on each. If the two seperate chips want to talk they've got to send stuff to the main motherboard chip (Northbridge) via the FSB. Like two pompous gits sitting next to each other on a bus, really, both thinking they're too good to talk to the other face to face. Or, a grumpy neighbor who only stays in touch by sending a letter by post, rather than just saying "hi" over the fence. There's a good picture here.
Normally that means the FSB gets clogged, like trying to cram a small elephant down a straw (and then back again), but in real life it just doesn't matter much for a desktop. Overclocking definitely helps though. Servers and workstations, that's something else.
As for AMD chips, they talk using an onboard Crossbar Switch, not unlike a network switch/hub really. The cores, memory controller, and hypertransport link (to the northbridge) are hooked up to this crossbar, and it's all on one bit of silicon. No MCM hot-gluing here. (Technically the cores are connected to a system request queue, which itself is linked to the Crossbar, but that's a bit irrelevant.) It's a pity the cores themselves can't quite match what's in a Core 2 Duo...
AMDs upcoming K10 Barcelona chip still uses that system, with four cores on the system request queue, one HT link on the crossbar (up to four in servers), two memory controllers, and a global 2MB store of L3 cache thrown in somewhere for good measure. Most likely that's on the crossbar as well. If the individual cores in a K10 can match/beat what's in a Core 2, they've got a damn good chip on their hands.
That should set you straight. Oh and by the by, first post!
